linux-kernel - [PATCH v2 3/4] arm64: dts: qcom: sm8350: Add TCSR halt register space

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Message-ID: <1698253601-11957-3-git-send-email-quic_mojha@quicinc.com>
Date:   Wed, 25 Oct 2023 22:36:40 +0530
From:   Mukesh Ojha <quic_mojha@...cinc.com>
To:     <agross@...nel.org>, <andersson@...nel.org>,
        <konrad.dybcio@...aro.org>, <lee@...nel.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>
CC:     <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        Mukesh Ojha <quic_mojha@...cinc.com>
Subject: [PATCH v2 3/4] arm64: dts: qcom: sm8350: Add TCSR halt register space

Enable download mode for sm8350 which can help collect
ramdump for this SoC.

Signed-off-by: Mukesh Ojha <quic_mojha@...cinc.com>
---
Changes in v2:
 - Improved commit text.

 arch/arm64/boot/dts/qcom/sm8350.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index b46236235b7f..0a0d47d7dab1 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -289,6 +289,7 @@
 	firmware {
 		scm: scm {
 			compatible = "qcom,scm-sm8350", "qcom,scm";
+			qcom,dload-mode = <&tcsr 0x13000>;
 			#reset-cells = <1>;
 		};
 	};
@@ -1818,6 +1819,11 @@
 			#hwlock-cells = <1>;
 		};
 
+		tcsr: syscon@...0000 {
+			compatible = "qcom,sm8350-tcsr", "syscon";
+			reg = <0x0 0x1fc0000 0x0 0x30000>;
+		};
+
 		lpass_tlmm: pinctrl@...0000 {
 			compatible = "qcom,sm8350-lpass-lpi-pinctrl";
 			reg = <0 0x033c0000 0 0x20000>,
-- 
2.7.4