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Message-ID: <MA0P287MB0332C00AB091FD7139560E25FEDEA@MA0P287MB0332.INDP287.PROD.OUTLOOK.COM> Date: Wed, 25 Oct 2023 08:48:57 +0800 From: Chen Wang <unicorn_wang@...look.com> To: Conor Dooley <conor@...nel.org>, linux-riscv@...ts.infradead.org, Jisheng Zhang <jszhang@...nel.org> Cc: Conor Dooley <conor.dooley@...rochip.com>, Chao Wei <chao.wei@...hgo.com>, Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org Subject: Re: [PATCH v1] riscv: dts: sophgo: remove address-cells from intc node On 2023/10/24 16:20, Conor Dooley wrote: > From: Conor Dooley <conor.dooley@...rochip.com> > > A recent submission [1] from Rob has added additionalProperties: false > to the interrupt-controller child node of RISC-V cpus, highlighting that > the new cv1800b DT has been incorrectly using #address-cells. > It has no child nodes, so #address-cells is not needed. Remove it. > > Link: https://patchwork.kernel.org/project/linux-riscv/patch/20230915201946.4184468-1-robh@kernel.org/ [1] > Fixes: c3dffa879cca ("riscv: dts: sophgo: add initial CV1800B SoC device tree") > Signed-off-by: Conor Dooley <conor.dooley@...rochip.com> > --- > CC: Chao Wei <chao.wei@...hgo.com> > CC: Chen Wang <unicorn_wang@...look.com> > CC: Rob Herring <robh+dt@...nel.org> > CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org> > CC: Paul Walmsley <paul.walmsley@...ive.com> > CC: Palmer Dabbelt <palmer@...belt.com> > CC: Albert Ou <aou@...s.berkeley.edu> > CC: devicetree@...r.kernel.org > CC: linux-riscv@...ts.infradead.org > CC: linux-kernel@...r.kernel.org > --- > arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > index df40e87ee063..aec6401a467b 100644 > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > @@ -34,7 +34,6 @@ cpu0: cpu@0 { > cpu0_intc: interrupt-controller { > compatible = "riscv,cpu-intc"; > interrupt-controller; > - #address-cells = <0>; > #interrupt-cells = <1>; > }; > }; Acked-by: Chen Wang <unicorn_wang@...look.com> Thanks,btw, will it be merged in 6.7? Looping Jisheng who is working on Duo/cv1800b.
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