linux-kernel - RE: [PATCH RESEND 1/2] drivers: clk: zynqmp: calculate closest mux rate

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Date:   Wed, 25 Oct 2023 12:24:25 +0000
From:   "Buddhabhatti, Jay" <jay.buddhabhatti@....com>
To:     Stephen Boyd <sboyd@...nel.org>,
        "Simek, Michal" <michal.simek@....com>,
        "mturquette@...libre.com" <mturquette@...libre.com>
CC:     "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH RESEND 1/2] drivers: clk: zynqmp: calculate closest mux
 rate

Hi Stephen,

> -----Original Message-----
> From: Stephen Boyd <sboyd@...nel.org>
> Sent: Tuesday, October 24, 2023 9:09 AM
> To: Buddhabhatti, Jay <jay.buddhabhatti@....com>; Simek, Michal
> <michal.simek@....com>; mturquette@...libre.com
> Cc: linux-clk@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-
> kernel@...r.kernel.org; Buddhabhatti, Jay <jay.buddhabhatti@....com>
> Subject: Re: [PATCH RESEND 1/2] drivers: clk: zynqmp: calculate closest mux
> rate
> 
> Quoting Jay Buddhabhatti (2023-10-16 04:30:01)
> > Currently zynqmp clock driver is not calculating closest mux rate and
> > because of that Linux is not setting proper frequency for CPU and not
> > able to set given frequency for dynamic frequency scaling.
> >
> > E.g., In current logic initial acpu clock parent and frequency as below
> > apll1                  0    0    0  2199999978    0     0  50000      Y
> >     acpu0_mux          0    0    0  2199999978    0     0  50000      Y
> >         acpu0_idiv1    0    0    0  2199999978    0     0  50000      Y
> >             acpu0      0    0    0  2199999978    0     0  50000      Y
> >
> > After changing acpu frequency to 549999994 Hz using CPU freq scaling
> > its selecting incorrect parent which is not closest frequency.
> > rpll_to_xpd            0    0    0  1599999984    0     0  50000      Y
> >     acpu0_mux          0    0    0  1599999984    0     0  50000      Y
> >         acpu0_div1     0    0    0   533333328    0     0  50000      Y
> >             acpu0      0    0    0   533333328    0     0  50000      Y
> >
> > Parent should remain same since 549999994 = 2199999978 / 4.
> >
> > So use __clk_mux_determine_rate_closest() generic function to
> > calculate closest rate for mux clock. After this change its selecting
> > correct parent and correct clock rate.
> > apll1                  0    0    0  2199999978    0     0  50000      Y
> >     acpu0_mux          0    0    0  2199999978    0     0  50000      Y
> >         acpu0_div1     0    0    0   549999995    0     0  50000      Y
> >             acpu0      0    0    0   549999995    0     0  50000      Y
> >
> > Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@....com>
> > ---
> 
> Any Fixes tag here?
[Jay] Sure I will add fixes tag.

Thanks,
Jay