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Message-ID: <20231025133320.4720-5-quic_sibis@quicinc.com>
Date: Wed, 25 Oct 2023 19:03:20 +0530
From: Sibi Sankar <quic_sibis@...cinc.com>
To: <andersson@...nel.org>, <konrad.dybcio@...aro.org>,
<mturquette@...libre.com>, <sboyd@...nel.org>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>
CC: <agross@...nel.org>, <conor+dt@...nel.org>,
<quic_tdas@...cinc.com>, <quic_rjendra@...cinc.com>,
<linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<neil.armstrong@...aro.org>, <abel.vesa@...aro.org>,
<quic_tsoni@...cinc.com>, Sibi Sankar <quic_sibis@...cinc.com>
Subject: [PATCH 4/4] clk: qcom: rpmh: Add support for SC8380XP rpmh clocks
From: Rajendra Nayak <quic_rjendra@...cinc.com>
Adds the RPMH clocks present in SC8380XP SoC
Co-developed-by: Neil Armstrong <neil.armstrong@...aro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
Signed-off-by: Rajendra Nayak <quic_rjendra@...cinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@...cinc.com>
---
drivers/clk/qcom/clk-rpmh.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
index 5d853fd43294..7f6d5f98957b 100644
--- a/drivers/clk/qcom/clk-rpmh.c
+++ b/drivers/clk/qcom/clk-rpmh.c
@@ -372,6 +372,9 @@ DEFINE_CLK_RPMH_VRM(clk3, _a1, "clka3", 1);
DEFINE_CLK_RPMH_VRM(clk4, _a1, "clka4", 1);
DEFINE_CLK_RPMH_VRM(clk5, _a1, "clka5", 1);
+DEFINE_CLK_RPMH_VRM(clk3, _a2, "clka3", 2);
+DEFINE_CLK_RPMH_VRM(clk4, _a2, "clka4", 2);
+DEFINE_CLK_RPMH_VRM(clk5, _a2, "clka5", 2);
DEFINE_CLK_RPMH_VRM(clk6, _a2, "clka6", 2);
DEFINE_CLK_RPMH_VRM(clk7, _a2, "clka7", 2);
DEFINE_CLK_RPMH_VRM(clk8, _a2, "clka8", 2);
@@ -737,6 +740,28 @@ static const struct clk_rpmh_desc clk_rpmh_sm4450 = {
.num_clks = ARRAY_SIZE(sm4450_rpmh_clocks),
};
+static struct clk_hw *sc8380xp_rpmh_clocks[] = {
+ [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw,
+ [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw,
+ [RPMH_LN_BB_CLK1] = &clk_rpmh_clk6_a2.hw,
+ [RPMH_LN_BB_CLK1_A] = &clk_rpmh_clk6_a2_ao.hw,
+ [RPMH_LN_BB_CLK2] = &clk_rpmh_clk7_a2.hw,
+ [RPMH_LN_BB_CLK2_A] = &clk_rpmh_clk7_a2_ao.hw,
+ [RPMH_LN_BB_CLK3] = &clk_rpmh_clk8_a2.hw,
+ [RPMH_LN_BB_CLK3_A] = &clk_rpmh_clk8_a2_ao.hw,
+ [RPMH_RF_CLK3] = &clk_rpmh_clk3_a2.hw,
+ [RPMH_RF_CLK3_A] = &clk_rpmh_clk3_a2_ao.hw,
+ [RPMH_RF_CLK4] = &clk_rpmh_clk4_a2.hw,
+ [RPMH_RF_CLK4_A] = &clk_rpmh_clk4_a2_ao.hw,
+ [RPMH_RF_CLK5] = &clk_rpmh_clk5_a2.hw,
+ [RPMH_RF_CLK5_A] = &clk_rpmh_clk5_a2_ao.hw,
+};
+
+static const struct clk_rpmh_desc clk_rpmh_sc8380xp = {
+ .clks = sc8380xp_rpmh_clocks,
+ .num_clks = ARRAY_SIZE(sc8380xp_rpmh_clocks),
+};
+
static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec,
void *data)
{
@@ -825,6 +850,7 @@ static const struct of_device_id clk_rpmh_match_table[] = {
{ .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180},
{ .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x},
{ .compatible = "qcom,sc8280xp-rpmh-clk", .data = &clk_rpmh_sc8280xp},
+ { .compatible = "qcom,sc8380xp-rpmh-clk", .data = &clk_rpmh_sc8380xp},
{ .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845},
{ .compatible = "qcom,sdm670-rpmh-clk", .data = &clk_rpmh_sdm670},
{ .compatible = "qcom,sdx55-rpmh-clk", .data = &clk_rpmh_sdx55},
--
2.17.1
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