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Message-Id: <20231025142820.390238-1-apatel@ventanamicro.com>
Date: Wed, 25 Oct 2023 19:58:17 +0530
From: Anup Patel <apatel@...tanamicro.com>
To: Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Thomas Gleixner <tglx@...utronix.de>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Frank Rowand <frowand.list@...il.com>
Cc: Conor Dooley <conor+dt@...nel.org>, Marc Zyngier <maz@...nel.org>,
Björn Töpel <bjorn@...nel.org>,
Atish Patra <atishp@...shpatra.org>,
Andrew Jones <ajones@...tanamicro.com>,
Sunil V L <sunilvl@...tanamicro.com>,
Saravana Kannan <saravanak@...gle.com>,
Anup Patel <anup@...infault.org>,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, Anup Patel <apatel@...tanamicro.com>
Subject: [PATCH 0/3] Linux RISC-V AIA Preparatory Series
The first three patches of the v11 Linux RISC-V AIA series can be
merged independently hence sending these patches as an independent
perparatory series.
(Refer, https://www.spinics.net/lists/devicetree/msg643764.html)
These patches can also be found in the riscv_aia_prep_v1 branch at:
https://github.com/avpatel/linux.git
Anup Patel (3):
RISC-V: Don't fail in riscv_of_parent_hartid() for disabled HARTs
of: property: Add fw_devlink support for msi-parent
irqchip/sifive-plic: Fix syscore registration for multi-socket systems
arch/riscv/kernel/cpu.c | 11 ++++++-----
drivers/irqchip/irq-sifive-plic.c | 7 ++++---
drivers/of/property.c | 2 ++
3 files changed, 12 insertions(+), 8 deletions(-)
--
2.34.1
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