lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <7871472b-a0c4-4475-9671-69a3244f956d@efficios.com>
Date:   Thu, 26 Oct 2023 14:59:13 -0400
From:   Mathieu Desnoyers <mathieu.desnoyers@...icios.com>
To:     Linus Torvalds <torvalds@...ux-foundation.org>
Cc:     Steven Rostedt <rostedt@...dmis.org>,
        Peter Zijlstra <peterz@...radead.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ankur Arora <ankur.a.arora@...cle.com>, linux-mm@...ck.org,
        x86@...nel.org, akpm@...ux-foundation.org, luto@...nel.org,
        bp@...en8.de, dave.hansen@...ux.intel.com, hpa@...or.com,
        mingo@...hat.com, juri.lelli@...hat.com,
        vincent.guittot@...aro.org, willy@...radead.org, mgorman@...e.de,
        jon.grimm@....com, bharata@....com, raghavendra.kt@....com,
        boris.ostrovsky@...cle.com, konrad.wilk@...cle.com,
        jgross@...e.com, andrew.cooper3@...rix.com,
        Joel Fernandes <joel@...lfernandes.org>,
        Youssef Esmat <youssefesmat@...omium.org>,
        Vineeth Pillai <vineethrp@...gle.com>,
        Suleiman Souhlal <suleiman@...gle.com>,
        Ingo Molnar <mingo@...nel.org>,
        Daniel Bristot de Oliveira <bristot@...nel.org>
Subject: Re: [POC][RFC][PATCH v2] sched: Extended Scheduler Time Slice

On 2023-10-26 14:50, Linus Torvalds wrote:
> On Thu, 26 Oct 2023 at 08:36, Mathieu Desnoyers
> <mathieu.desnoyers@...icios.com> wrote:
>>
>>>        asm volatile("xchg %b0,%1"
>>
>> which has an implicit lock prefix (xchg with a memory operand is a
>> special-case):
> 
> Yeah, this is why we do "percpu_xchg()" - which does not want locked
> semantics - as a "cmpxchg" loop.
> 
> Steven, check out
> 
>      arch/x86/include/asm/percpu.h
> 
> for a rough implementation of a 'xchg()' without SMP coherency, just
> cpu-local one (ie atomic wrt being preempted by the kernel, but not
> atomic wrt other CPU's accessing the same variable concurrently)

Actually Steven does not need a xchg to test-and-set a single bit which
is only accessed concurrently between kernel and userspace from the same
thread. Either "bts" or "andb" should work fine.

Thanks,

Mathieu

> 
>               Linus

-- 
Mathieu Desnoyers
EfficiOS Inc.
https://www.efficios.com

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ