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Message-ID: <a6cc8d55-2892-478f-ad8a-a9a4359abb7d@linaro.org> Date: Thu, 26 Oct 2023 22:01:26 +0200 From: Konrad Dybcio <konrad.dybcio@...aro.org> To: Christian Marangi <ansuelsmth@...il.com>, Ilia Lin <ilia.lin@...nel.org>, Andy Gross <agross@...nel.org>, Bjorn Andersson <andersson@...nel.org>, "Rafael J. Wysocki" <rafael@...nel.org>, Viresh Kumar <viresh.kumar@...aro.org>, Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, Nishanth Menon <nm@...com>, Stephen Boyd <sboyd@...nel.org>, Sricharan Ramabadhran <quic_srichara@...cinc.com>, linux-pm@...r.kernel.org, linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org Subject: Re: [PATCH v6 3/4] cpufreq: qcom-nvmem: add support for IPQ8064 On 10/13/23 19:38, Christian Marangi wrote: > IPQ8064 comes in 3 families: > * IPQ8062 up to 1.0GHz > * IPQ8064/IPQ8066/IPQ8068 up to 1.4GHz > * IPQ8065/IPQ8069 up to 1.7Ghz > > So, in order to be able to support one OPP table, add support for > IPQ8064 family based of SMEM SoC ID-s and correctly set the version so > opp-supported-hw can be correctly used. > > Bit are set with the following logic: > * IPQ8062 BIT 0 > * IPQ8064/IPQ8066/IPQ8068 BIT 1 > * IPQ8065/IPQ8069 BIT 2 > > speed is never fused, only pvs values are fused. > > IPQ806x SoC doesn't have pvs_version so we drop and we use the new > pattern: > opp-microvolt-speed0-pvs<PSV_VALUE> > > Example: > - for ipq8062 psv2 > opp-microvolt-speed0-pvs2 = < 925000 878750 971250> > > Fixes: a8811ec764f9 ("cpufreq: qcom: Add support for krait based socs") > Signed-off-by: Christian Marangi <ansuelsmth@...il.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org> Konrad
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