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Date:   Thu, 26 Oct 2023 16:45:49 -0400
From:   Steven Rostedt <rostedt@...dmis.org>
To:     Mathieu Desnoyers <mathieu.desnoyers@...icios.com>
Cc:     Linus Torvalds <torvalds@...ux-foundation.org>,
        Peter Zijlstra <peterz@...radead.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ankur Arora <ankur.a.arora@...cle.com>, linux-mm@...ck.org,
        x86@...nel.org, akpm@...ux-foundation.org, luto@...nel.org,
        bp@...en8.de, dave.hansen@...ux.intel.com, hpa@...or.com,
        mingo@...hat.com, juri.lelli@...hat.com,
        vincent.guittot@...aro.org, willy@...radead.org, mgorman@...e.de,
        jon.grimm@....com, bharata@....com, raghavendra.kt@....com,
        boris.ostrovsky@...cle.com, konrad.wilk@...cle.com,
        jgross@...e.com, andrew.cooper3@...rix.com,
        Joel Fernandes <joel@...lfernandes.org>,
        Youssef Esmat <youssefesmat@...omium.org>,
        Vineeth Pillai <vineethrp@...gle.com>,
        Suleiman Souhlal <suleiman@...gle.com>,
        Ingo Molnar <mingo@...nel.org>,
        Daniel Bristot de Oliveira <bristot@...nel.org>
Subject: Re: [POC][RFC][PATCH v2] sched: Extended Scheduler Time Slice

On Thu, 26 Oct 2023 14:59:13 -0400
Mathieu Desnoyers <mathieu.desnoyers@...icios.com> wrote:

> > for a rough implementation of a 'xchg()' without SMP coherency, just
> > cpu-local one (ie atomic wrt being preempted by the kernel, but not
> > atomic wrt other CPU's accessing the same variable concurrently)  
> 
> Actually Steven does not need a xchg to test-and-set a single bit which
> is only accessed concurrently between kernel and userspace from the same
> thread. Either "bts" or "andb" should work fine.

Hmm, how would bts work? Doesn't that just set a bit?

I need to clear one bit while seeing if another bit is set. I could also
use subl, as that would also atomically clear the bit.

-- Steve

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