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Message-ID: <b165d2cd-e8da-4f6d-9ecf-14df2b803614@linaro.org>
Date:   Thu, 26 Oct 2023 12:23:52 +0200
From:   Konrad Dybcio <konrad.dybcio@...aro.org>
To:     Sibi Sankar <quic_sibis@...cinc.com>, andersson@...nel.org,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        catalin.marinas@....com, ulf.hansson@...aro.org
Cc:     agross@...nel.org, conor+dt@...nel.org, ayan.kumar.halder@....com,
        j@...nau.net, dmitry.baryshkov@...aro.org, nfraprado@...labora.com,
        m.szyprowski@...sung.com, u-kumar1@...com, peng.fan@....com,
        lpieralisi@...nel.org, quic_rjendra@...cinc.com,
        abel.vesa@...aro.org, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, quic_tsoni@...cinc.com,
        neil.armstrong@...aro.org
Subject: Re: [PATCH 1/5] dt-bindings: arm: cpus: Add qcom,oryon compatible



On 10/25/23 16:24, Sibi Sankar wrote:
> From: Rajendra Nayak <quic_rjendra@...cinc.com>
> 
> These are the CPU cores in Qualcomm's SC8380XP SoC.
> 
> Signed-off-by: Rajendra Nayak <quic_rjendra@...cinc.com>
> Signed-off-by: Sibi Sankar <quic_sibis@...cinc.com>
> ---
There was an off-list discussion, not sure if it reached you in the
end, but this won't fly. I was told there are at least two separate
core types (discernable by a different MIDR_EL1[PART_NUM] [1]), all
of which should have their own compatible, otherwise we will introduce
something as meaningless as qcom,kryo before - we want more
granularity, like arm,cortex-x1 or arm,cortex-a78 are separate.


[1] https://developer.arm.com/documentation/ddi0601/2023-09/AArch64-Registers/MIDR-EL1--Main-ID-Register

Konrad

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