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Message-ID: <8dc48acb-46f0-47fa-bf7f-ee2d09eebcb3@linaro.org>
Date: Thu, 26 Oct 2023 13:06:54 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Sibi Sankar <quic_sibis@...cinc.com>, andersson@...nel.org,
mturquette@...libre.com, sboyd@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org
Cc: agross@...nel.org, conor+dt@...nel.org, quic_tdas@...cinc.com,
quic_rjendra@...cinc.com, linux-arm-msm@...r.kernel.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, neil.armstrong@...aro.org,
abel.vesa@...aro.org, quic_tsoni@...cinc.com
Subject: Re: [PATCH 2/4] clk: qcom: Add Global Clock controller (GCC) driver
for SC8380XP
On 10/25/23 15:33, Sibi Sankar wrote:
> From: Rajendra Nayak <quic_rjendra@...cinc.com>
>
> Add support for the global clock controller found on SC8380XP
> based devices.
>
> Co-developed-by: Abel Vesa <abel.vesa@...aro.org>
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> Signed-off-by: Rajendra Nayak <quic_rjendra@...cinc.com>
> Signed-off-by: Sibi Sankar <quic_sibis@...cinc.com>
> ---
[...]
> +static int gcc_sc8380xp_probe(struct platform_device *pdev)
> +{
> + struct regmap *regmap;
> + int ret;
> +
> + regmap = qcom_cc_map(pdev, &gcc_sc8380xp_desc);
> + if (IS_ERR(regmap))
> + return PTR_ERR(regmap);
> +
> + ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks,
> + ARRAY_SIZE(gcc_dfs_clocks));
> + if (ret)
> + return ret;
> +
> + /*
> + * Keep the critical clock always-On
> + * gcc_camera_ahb_clk, gcc_camera_xo_clk, gcc_disp_ahb_clk,
> + * gcc_disp_xo_clk, gcc_gpu_cfg_ahb_clk, gcc_video_ahb_clk,
> + * gcc_video_xo_clk
> + */
> + regmap_update_bits(regmap, 0x26004, BIT(0), BIT(0));
Please inline the clock names, like so:
regmap_update_bits(regmap, 0x26004, BIT(0), BIT(0)); /* gcc_camera_ahb_clk */
LGTM otherwise
Konrad
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