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Message-ID: <a7321404-0c8f-430c-b14c-7ffc9e4fc5d7@collabora.com>
Date: Thu, 26 Oct 2023 13:45:00 +0200
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: "yu-chang.lee" <yu-chang.lee@...iatek.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>
Cc: Chen-Yu Tsai <wenst@...omium.org>,
Moudy Ho <moudy.ho@...iatek.com>,
Uwe Kleine-König <u.kleine-koenig@...gutronix.de>,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH] clk: mediatek: mt8188: probe vpp with
mtk_clk_simple_probe()
Il 26/10/23 13:38, yu-chang.lee ha scritto:
> switch to the common mtk_clk_simple_probe() function for all of the
> clock drivers that are registering as platform drivers.
>
So VPPSYS0 and VPPSYS1 aren't dependant on MMSYS anymore?
Like this, it doesn't look like this will ever work fine, so if you want
that to happen, you must provide a good explanation, and then, since MT8188
and MT8195's VPPSYS are practically the same, you should also convert MT8195
to do the same, and make sure that everything works as expected before sending
a commit upstream.
Please, explain.
Thanks,
Angelo
> Signed-off-by: yu-chang.lee <yu-chang.lee@...iatek.com>
> ---
> drivers/clk/mediatek/clk-mt8188-vpp0.c | 14 +++++++++++---
> drivers/clk/mediatek/clk-mt8188-vpp1.c | 14 +++++++++++---
> 2 files changed, 22 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-mt8188-vpp0.c b/drivers/clk/mediatek/clk-mt8188-vpp0.c
> index e7b02b26fefb..18fffa191ee1 100644
> --- a/drivers/clk/mediatek/clk-mt8188-vpp0.c
> +++ b/drivers/clk/mediatek/clk-mt8188-vpp0.c
> @@ -96,6 +96,15 @@ static const struct mtk_clk_desc vpp0_desc = {
> .num_clks = ARRAY_SIZE(vpp0_clks),
> };
>
> +static const struct of_device_id of_match_clk_mt8188_vpp0[] = {
> + {
> + .compatible = "mediatek,mt8188-vppsys0",
> + .data = &vpp0_desc,
> + }, {
> + /* sentinel */
> + }
> +};
> +
> static const struct platform_device_id clk_mt8188_vpp0_id_table[] = {
> { .name = "clk-mt8188-vpp0", .driver_data = (kernel_ulong_t)&vpp0_desc },
> { /* sentinel */ }
> @@ -103,12 +112,11 @@ static const struct platform_device_id clk_mt8188_vpp0_id_table[] = {
> MODULE_DEVICE_TABLE(platform, clk_mt8188_vpp0_id_table);
>
> static struct platform_driver clk_mt8188_vpp0_drv = {
> - .probe = mtk_clk_pdev_probe,
> - .remove_new = mtk_clk_pdev_remove,
> + .probe = mtk_clk_simple_probe,
> .driver = {
> .name = "clk-mt8188-vpp0",
> + .of_match_table = of_match_clk_mt8188_vpp0,
> },
> - .id_table = clk_mt8188_vpp0_id_table,
> };
> module_platform_driver(clk_mt8188_vpp0_drv);
> MODULE_LICENSE("GPL");
> diff --git a/drivers/clk/mediatek/clk-mt8188-vpp1.c b/drivers/clk/mediatek/clk-mt8188-vpp1.c
> index e8f0f7eca097..f4b35336d427 100644
> --- a/drivers/clk/mediatek/clk-mt8188-vpp1.c
> +++ b/drivers/clk/mediatek/clk-mt8188-vpp1.c
> @@ -91,6 +91,15 @@ static const struct mtk_clk_desc vpp1_desc = {
> .num_clks = ARRAY_SIZE(vpp1_clks),
> };
>
> +static const struct of_device_id of_match_clk_mt8188_vpp1[] = {
> + {
> + .compatible = "mediatek,mt8188-vppsys1",
> + .data = &vpp1_desc,
> + }, {
> + /* sentinel */
> + }
> +};
> +
> static const struct platform_device_id clk_mt8188_vpp1_id_table[] = {
> { .name = "clk-mt8188-vpp1", .driver_data = (kernel_ulong_t)&vpp1_desc },
> { /* sentinel */ }
> @@ -98,12 +107,11 @@ static const struct platform_device_id clk_mt8188_vpp1_id_table[] = {
> MODULE_DEVICE_TABLE(platform, clk_mt8188_vpp1_id_table);
>
> static struct platform_driver clk_mt8188_vpp1_drv = {
> - .probe = mtk_clk_pdev_probe,
> - .remove_new = mtk_clk_pdev_remove,
> + .probe = mtk_clk_simple_probe,
> .driver = {
> .name = "clk-mt8188-vpp1",
> + .of_match_table = of_match_clk_mt8188_vpp1,
> },
> - .id_table = clk_mt8188_vpp1_id_table,
> };
> module_platform_driver(clk_mt8188_vpp1_drv);
> MODULE_LICENSE("GPL");
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