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Message-Id: <20231026152316.2729575-1-estl@gmx.net>
Date:   Thu, 26 Oct 2023 17:23:01 +0200
From:   Eberhard Stoll <estl@....net>
To:     Han Xu <han.xu@....com>, linux-kernel@...r.kernel.org,
        linux-mtd@...ts.infradead.org, linux-spi@...r.kernel.org,
        Mark Brown <broonie@...nel.org>,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        Richard Weinberger <richard@....at>,
        Vignesh Raghavendra <vigneshr@...com>
Cc:     Eberhard Stoll <eberhard.stoll@...tron.de>,
        Amit Kumar Mahapatra <amit.kumar-mahapatra@....com>,
        Amit Kumar Mahapatra via Alsa-devel 
        <alsa-devel@...a-project.org>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Cédric Le Goater <clg@...d.org>,
        Christophe JAILLET <christophe.jaillet@...adoo.fr>,
        Chuanhong Guo <gch981213@...il.com>,
        Dhruva Gole <d-gole@...com>,
        Dmitry Rokosov <ddrokosov@...rdevices.ru>,
        Frieder Schrempf <frieder.schrempf@...tron.de>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Krishna Yarlagadda <kyarlagadda@...dia.com>,
        Mario Kicherer <dev@...herer.org>,
        Martin Kurbanov <mmkurbanov@...rdevices.ru>,
        Olivier Maignial <olivier.maignial@...mail.fr>,
        Rob Herring <robh@...nel.org>,
        Serge Semin <fancer.lancer@...il.com>,
        Uwe Kleine-König 
        <u.kleine-koenig@...gutronix.de>,
        William Zhang <william.zhang@...adcom.com>,
        Yang Yingliang <yangyingliang@...wei.com>
Subject: [PATCH 0/4] Add tCLQV parameter to tweak SPI timings

From: Eberhard Stoll <eberhard.stoll@...tron.de>

Hi All,

this patch series adds parameters to tweak SPI timings for some
(Q)SPI devices. For example it optimizes the support for the operation
of a Winbond W25N02KV SPI NAND chip on NXP i.mx6 ul(l) devices.

The Winbond W25N02KV SPI NAND has the characteristic to introduce a
delay between spi clock and the masters spi receive data (called tCLQV
value in data sheet).

This chip can operate with a maximum SPI clock of 104MHz. Disregarding
the requred tCLQV value of 7ns for this chip reduces the possible spi
clock to approx. 70MHz. To support the full bandwith of this chip, the
tCLQV parameter has to be supported in SPI framework and SPI controller
and the SPI NAND chip needs this parameter in the device configuration
data.

Also other devices can improve their operating SPI clock performance
with this setting if they also has significant tCLQV values and the SPI
controller will support it.

This patch series adds support the tCLQV parameter in:

- SPI framework
- SPI NAND framework
- NXP i.mx6 QSPI controller
- Winbond W25N02KV SPI NAND device


Eberhard Stoll (4):
  spi: Add parameter for clock to rx delay
  mtd: spinand: Add support for clock to rx delay setting
  mtd: spinand: winbond: Add rx sample delay for W25N02KV
  spi: spi-fsl-qspi: Add support for rx data sample point adjustment

 drivers/mtd/nand/spi/core.c    |  2 +
 drivers/mtd/nand/spi/winbond.c |  3 +-
 drivers/spi/spi-fsl-qspi.c     | 80 ++++++++++++++++++++++++++++++++++
 include/linux/mtd/spinand.h    |  5 +++
 include/linux/spi/spi.h        |  3 ++
 5 files changed, 92 insertions(+), 1 deletion(-)


base-commit: 05d3ef8bba77c1b5f98d941d8b2d4aeab8118ef1
--
2.25.1

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