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Message-ID: <b1634b24-4541-49c5-867c-7f24292a27bb@paulmck-laptop> Date: Fri, 27 Oct 2023 14:08:13 -0700 From: "Paul E. McKenney" <paulmck@...nel.org> To: j.alglave@....ac.uk, will@...nel.org, catalin.marinas@....com, linux@...linux.org.uk, mpe@...erman.id.au, npiggin@...il.com, palmer@...belt.com, parri.andrea@...il.com Cc: linux-kernel@...r.kernel.org, linux-toolchains@...r.kernel.org, peterz@...radead.org, boqun.feng@...il.com, davidtgoldblatt@...il.com Subject: Fw: [isocpp-parallel] OOTA fix (via fake branch-after-load) discussion Hello! FYI, unless someone complains, it is quite likely that C++ (and thus likely C) compilers and standards will enforce Hans Boehm's proposal for ordering relaxed loads before relaxed stores. The document [1] cites "Bounding data races in space and time" by Dolan et al. [2], and notes an "average a 2.x% slow down" for ARMv8 and PowerPC. In the past, this has been considered unacceptable, among other things, due to the fact that this issue is strictly theoretical. This would not (repeat, not) affect the current Linux kernel, which relies on volatile loads and stores rather than C/C++ atomics. To be clear, the initial proposal is not to change the standards, but rather to add a command-line argument to enforce the stronger ordering. However, given the long list of ARM-related folks in the Acknowledgments section, the future direction is clear. So, do any ARMv8, PowerPC, or RISC-V people still care? If so, I strongly recommend speaking up. ;-) Thanx, Paul [1] https://lukegeeson.com/blog/2023-10-17-A-Proposal-For-Relaxed-Atomics/ [2] https://dl.acm.org/doi/10.1145/3192366.3192421 ----- Forwarded message from David Goldblatt via Parallel <parallel@...ts.isocpp.org> ----- Date: Fri, 27 Oct 2023 11:09:18 -0700 From: David Goldblatt via Parallel <parallel@...ts.isocpp.org> To: SG1 concurrency and parallelism <parallel@...ts.isocpp.org> Reply-To: parallel@...ts.isocpp.org Cc: David Goldblatt <davidtgoldblatt@...il.com> Subject: [isocpp-parallel] OOTA fix (via fake branch-after-load) discussion Those who read this list but not the LLVM discourse might be interested in: - This discussion, proposing `-mstrict-rlx-atomics`: https://discourse.llvm.org/t/rfc-strengthen-relaxed-atomics-implementation-behind-mstrict-rlx-atomics-flag/74473 to enforce load-store ordering - The associated blog post here: https://lukegeeson.com/blog/2023-10-17-A-Proposal-For-Relaxed-Atomics/ - David _______________________________________________ Parallel mailing list Parallel@...ts.isocpp.org Subscription: https://lists.isocpp.org/mailman/listinfo.cgi/parallel Link to this post: http://lists.isocpp.org/parallel/2023/10/4151.php ----- End forwarded message -----
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