linux-kernel - Re: [PATCH 5/5] riscv: configs: defconfig: Enable configs required for RZ/Five SoC

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Message-ID: <mhng-ac92041d-85e9-4725-b61c-bc0fef5549ec@palmer-ri-x1c9a>
Date:   Fri, 27 Oct 2023 15:11:20 -0700 (PDT)
From:   Palmer Dabbelt <palmer@...belt.com>
To:     geert@...ux-m68k.org
CC:     prabhakar.csengg@...il.com, magnus.damm@...il.com,
        conor+dt@...nel.org, Paul Walmsley <paul.walmsley@...ive.com>,
        aou@...s.berkeley.edu, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org,
        linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        biju.das.jz@...renesas.com, prabhakar.mahadev-lad.rj@...renesas.com
Subject:     Re: [PATCH 5/5] riscv: configs: defconfig: Enable configs required for RZ/Five SoC

On Tue, 03 Oct 2023 05:34:13 PDT (-0700), geert@...ux-m68k.org wrote:
> Hi Prabhakar,
>
> On Fri, Sep 29, 2023 at 2:07 AM Prabhakar <prabhakar.csengg@...il.com> wrote:
>> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>>
>> Enable the configs required by the below IP blocks which are
>> present on RZ/Five SoC:
>> * ADC
>> * CANFD
>> * DMAC
>> * eMMC/SDHI
>> * OSTM
>> * RAVB (+ Micrel PHY)
>> * RIIC
>> * RSPI
>> * SSI (Sound+WM8978 codec)
>> * Thermal
>> * USB (PHY/RESET/OTG)
>>
>> Along with the above some core configs are enabled too,
>> -> CPU frequency scaling as RZ/Five does support this.
>> -> MTD is enabled as RSPI can be connected to flash chips
>> -> Enabled I2C chardev so that it enables userspace to read/write
>>    i2c devices (similar to arm64)
>> -> Thermal configs as RZ/Five SoC does have thermal unit
>> -> GPIO regulator as we might have IP blocks for which voltage
>>    levels are controlled by GPIOs
>> -> OTG configs as RZ/Five USB can support host/function
>> -> Gadget configs so that we can test USB function (as done in arm64
>>    all the gadget configs are enabled)
>>
>> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
>
> As I expect this to go in through the RISC-V tree, I will let the
> RISC-V people handle any discussion about more options that should be
> made modular instead of builtin.

I'm pretty much agnostic on that front, so I'm cool just picking up 
this.  I've got just patch 5 in my queue for testing, there's a few 
other things in front of it but it should show up on for-next soon.

>
> Gr{oetje,eeting}s,
>
>                         Geert