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Message-ID: <20231027082144.639369-3-wtli@nuvoton.com>
Date: Fri, 27 Oct 2023 16:21:44 +0800
From: Seven Lee <wtli@...oton.com>
To: <broonie@...nel.org>
CC: <lgirdwood@...il.com>, <alsa-devel@...a-project.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<robh+dt@...nel.org>, <conor+dt@...nel.org>,
<YHCHuang@...oton.com>, <KCHSU0@...oton.com>, <CTLIN0@...oton.com>,
<SJLIN0@...oton.com>, <scott6986@...il.com>,
<supercraig0719@...il.com>, <dardar923@...il.com>,
<wtli@...oton.com>
Subject: [PATCH v2 2/2] ASoC: nau8821: Add slew rate controls.
The patch supports DMIC clock slew rate selection.
Signed-off-by: Seven Lee <wtli@...oton.com>
---
sound/soc/codecs/nau8821.c | 7 +++++++
sound/soc/codecs/nau8821.h | 3 +++
2 files changed, 10 insertions(+)
diff --git a/sound/soc/codecs/nau8821.c b/sound/soc/codecs/nau8821.c
index 6e1b6b26298a..d8190e8a431f 100644
--- a/sound/soc/codecs/nau8821.c
+++ b/sound/soc/codecs/nau8821.c
@@ -1738,6 +1738,10 @@ static int nau8821_read_device_properties(struct device *dev,
&nau8821->dmic_clk_threshold);
if (ret)
nau8821->dmic_clk_threshold = 3072000;
+ ret = device_property_read_u32(dev, "nuvoton,dmic-slew-rate-selection",
+ &nau8821->dmic_slew_rate_sel);
+ if (ret)
+ nau8821->dmic_slew_rate_sel = 0;
return 0;
}
@@ -1797,6 +1801,9 @@ static void nau8821_init_regs(struct nau8821 *nau8821)
NAU8821_ADC_SYNC_DOWN_MASK, NAU8821_ADC_SYNC_DOWN_64);
regmap_update_bits(regmap, NAU8821_R2C_DAC_CTRL1,
NAU8821_DAC_OVERSAMPLE_MASK, NAU8821_DAC_OVERSAMPLE_64);
+ regmap_update_bits(regmap, NAU8821_R13_DMIC_CTRL,
+ NAU8821_DMIC_SLEW_MASK, nau8821->dmic_slew_rate_sel <<
+ NAU8821_DMIC_SLEW_SFT);
if (nau8821->left_input_single_end) {
regmap_update_bits(regmap, NAU8821_R6B_PGA_MUTE,
NAU8821_MUTE_MICNL_EN, NAU8821_MUTE_MICNL_EN);
diff --git a/sound/soc/codecs/nau8821.h b/sound/soc/codecs/nau8821.h
index 00a888ed07ce..480f605d5d50 100644
--- a/sound/soc/codecs/nau8821.h
+++ b/sound/soc/codecs/nau8821.h
@@ -236,6 +236,8 @@
#define NAU8821_DMIC_SRC_MASK (0x3 << NAU8821_DMIC_SRC_SFT)
#define NAU8821_CLK_DMIC_SRC (0x2 << NAU8821_DMIC_SRC_SFT)
#define NAU8821_DMIC_EN_SFT 0
+#define NAU8821_DMIC_SLEW_SFT 8
+#define NAU8821_DMIC_SLEW_MASK (0x7 << NAU8821_DMIC_SLEW_SFT)
/* GPIO12_CTRL (0x1a) */
#define NAU8821_JKDET_PULL_UP (0x1 << 11) /* 0 - pull down, 1 - pull up */
@@ -573,6 +575,7 @@ struct nau8821 {
int jack_eject_debounce;
int fs;
int dmic_clk_threshold;
+ int dmic_slew_rate_sel;
int key_enable;
};
--
2.25.1
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