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Message-ID: <7bfa2f6c-3e99-49a6-9b5a-81398d4bce7e@linaro.org>
Date:   Fri, 27 Oct 2023 13:25:56 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Wolfram Sang <wsa@...nel.org>,
        Chris Packham <chris.packham@...iedtelesis.co.nz>,
        krzysztof.kozlowski+dt@...aro.org, gregory.clement@...tlin.com,
        andi.shyti@...nel.org, robh+dt@...nel.org, conor+dt@...nel.org,
        linux-i2c@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, Abel Vesa <abel.vesa@...aro.org>
Subject: Re: [PATCH v5 1/2] dt-bindings: i2c: mv64xxx: add bus-reset-gpios
 property

On 27/10/2023 11:09, Wolfram Sang wrote:
> On Fri, Oct 27, 2023 at 04:31:03PM +1300, Chris Packham wrote:
>> Add bus-reset-gpios and bus-reset-duration-us properties to the
>> marvell,mv64xxx-i2c binding. These can be used to describe hardware
>> where a common reset GPIO is connected to all downstream devices on and
>> I2C bus. This reset will be asserted then released before the downstream
>> devices on the bus are probed.
>>
>> Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> 
> Krzysztof, are you fine with this change?

Actually no. NAK.

Not because of the naming, but because the new name triggered some new
paths in my brain which brought the point - this is old problem of power
sequencing of children.

I believe this must be solved in more generic way. First - generic for
all I2C devices. Second - generic also matching other buses/subsystems,
which have similar problem. We did it for USB (onboard USB), MMC
(unloved MMC power sequence) and now we are doing it for PCIe and few
others (Cc: Abel)

https://lpc.events/event/17/contributions/1507/

Current solution is heavily limited. What about regulators? What about
buses having 2 reset lines (still the same bus)? What about sequence?

Best regards,
Krzysztof

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