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Message-ID: <CAK9=C2WC7N-9LgrtpfeWCT08iToqMevgvR0rkjEvdJFPzNDkMQ@mail.gmail.com>
Date: Fri, 27 Oct 2023 20:08:24 +0530
From: Anup Patel <apatel@...tanamicro.com>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Frank Rowand <frowand.list@...il.com>,
Conor Dooley <conor+dt@...nel.org>,
Marc Zyngier <maz@...nel.org>,
Björn Töpel <bjorn@...nel.org>,
Atish Patra <atishp@...shpatra.org>,
Andrew Jones <ajones@...tanamicro.com>,
Sunil V L <sunilvl@...tanamicro.com>,
Saravana Kannan <saravanak@...gle.com>,
Anup Patel <anup@...infault.org>,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, Atish Patra <atishp@...osinc.com>
Subject: Re: [PATCH 1/3] RISC-V: Don't fail in riscv_of_parent_hartid() for
disabled HARTs
On Fri, Oct 27, 2023 at 1:29 PM Thomas Gleixner <tglx@...utronix.de> wrote:
>
> On Wed, Oct 25 2023 at 19:58, Anup Patel wrote:
> > The riscv_of_processor_hartid() used by riscv_of_parent_hartid() fails
> > for HARTs disabled in the DT. This results in the following warning
> > thrown by the RISC-V INTC driver for the E-core on SiFive boards:
> >
> > [ 0.000000] riscv-intc: unable to find hart id for /cpus/cpu@...nterrupt-controller
> >
> > The riscv_of_parent_hartid() is only expected to read the hartid from
> > the DT so we should directly call of_get_cpu_hwid() instead of calling
>
> We should? Or maybe not?
>
> Please write precise changelogs and use imperative wording as documented
> in Documentation/process.
Sure, I will update the wording in the commit description.
Thanks,
Anup
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