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Message-ID: <202310281539.nqlVBqte-lkp@intel.com>
Date: Sat, 28 Oct 2023 15:22:29 +0800
From: kernel test robot <lkp@...el.com>
To: Jiaxun Yang <jiaxun.yang@...goat.com>, linux-mips@...r.kernel.org
Cc: oe-kbuild-all@...ts.linux.dev, linux-kernel@...r.kernel.org,
tsbogend@...ha.franken.de, gregory.clement@...tlin.com,
vladimir.kondratiev@...el.com,
Jiaxun Yang <jiaxun.yang@...goat.com>
Subject: Re: [PATCH v2 05/10] MIPS: Refactor mips_cps_core_entry
implementation
Hi Jiaxun,
kernel test robot noticed the following build warnings:
[auto build test WARNING on linus/master]
[also build test WARNING on v6.6-rc7 next-20231027]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Jiaxun-Yang/MIPS-Export-higher-highest-relocation-functions-in-uasm/20231028-061419
base: linus/master
patch link: https://lore.kernel.org/r/20231027221106.405666-6-jiaxun.yang%40flygoat.com
patch subject: [PATCH v2 05/10] MIPS: Refactor mips_cps_core_entry implementation
config: mips-allyesconfig (https://download.01.org/0day-ci/archive/20231028/202310281539.nqlVBqte-lkp@intel.com/config)
compiler: mips-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231028/202310281539.nqlVBqte-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202310281539.nqlVBqte-lkp@intel.com/
All warnings (new ones prefixed by >>):
arch/mips/kernel/smp-cps.c: In function 'setup_cps_vecs':
>> arch/mips/kernel/smp-cps.c:150:19: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
150 | cps_vec = (void *)TO_UNCAC(cps_vec_pa);
| ^
vim +150 arch/mips/kernel/smp-cps.c
114
115 static int __init setup_cps_vecs(void)
116 {
117 extern void excep_tlbfill(void);
118 extern void excep_xtlbfill(void);
119 extern void excep_cache(void);
120 extern void excep_genex(void);
121 extern void excep_intex(void);
122 extern void excep_ejtag(void);
123 phys_addr_t cps_vec_pa;
124 void *cps_vec;
125
126 /* Try to allocate in KSEG1 first */
127 cps_vec_pa = memblock_phys_alloc_range(BEV_VEC_SIZE, BEV_VEC_ALIGN,
128 0x0, KSEGX_SIZE - 1);
129
130 if (cps_vec_pa)
131 core_entry_reg = CKSEG1ADDR(cps_vec_pa) &
132 CM_GCR_Cx_RESET_BASE_BEVEXCBASE;
133
134 if (!cps_vec_pa && mips_cm_is64) {
135 cps_vec_pa = memblock_phys_alloc_range(BEV_VEC_SIZE, BEV_VEC_ALIGN,
136 0x0, SZ_4G - 1);
137 if (cps_vec_pa)
138 core_entry_reg = (cps_vec_pa & CM_GCR_Cx_RESET_BASE_BEVEXCBASE) |
139 CM_GCR_Cx_RESET_BASE_MODE;
140 }
141
142 if (!cps_vec_pa)
143 return -ENOMEM;
144
145 /* We want to ensure cache is clean before writing uncached mem */
146 blast_dcache_range(TO_CAC(cps_vec_pa), TO_CAC(cps_vec_pa) + BEV_VEC_SIZE);
147 bc_wback_inv(TO_CAC(cps_vec_pa), BEV_VEC_SIZE);
148 __sync();
149
> 150 cps_vec = (void *)TO_UNCAC(cps_vec_pa);
151 mips_cps_build_core_entry(cps_vec);
152
153 memcpy(cps_vec + 0x200, &excep_tlbfill, 0x80);
154 memcpy(cps_vec + 0x280, &excep_xtlbfill, 0x80);
155 memcpy(cps_vec + 0x300, &excep_cache, 0x80);
156 memcpy(cps_vec + 0x380, &excep_genex, 0x80);
157 memcpy(cps_vec + 0x400, &excep_intex, 0x80);
158 memcpy(cps_vec + 0x480, &excep_ejtag, 0x80);
159
160 /* Make sure no prefetched data in cache */
161 blast_inv_dcache_range(TO_CAC(cps_vec_pa), TO_CAC(cps_vec_pa) + BEV_VEC_SIZE);
162 bc_inv(TO_CAC(cps_vec_pa), BEV_VEC_SIZE);
163 __sync();
164
165 return 0;
166 }
167
--
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