linux-kernel - Re: [PATCH v2 4/4] fixup! pinctrl: qcom: handle intr_target_reg wakeup

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Message-ID: <96a09732-8923-4af6-b063-0944100c24c7@linaro.org>
Date:   Mon, 30 Oct 2023 10:54:05 +0100
From:   Neil Armstrong <neil.armstrong@...aro.org>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>
Cc:     linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 4/4] fixup! pinctrl: qcom: handle intr_target_reg
 wakeup_present/enable bits

Hi,

On 30/10/2023 10:50, Neil Armstrong wrote:
> ---
>   drivers/pinctrl/qcom/pinctrl-msm.c | 10 ++++++++++
>   1 file changed, 10 insertions(+)

Please ignore this patch, I forgot to sqash it....

Neil

> 
> diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
> index 2489a9ac8455..207b41018580 100644
> --- a/drivers/pinctrl/qcom/pinctrl-msm.c
> +++ b/drivers/pinctrl/qcom/pinctrl-msm.c
> @@ -1197,6 +1197,7 @@ static int msm_gpio_irq_reqres(struct irq_data *d)
>   	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>   	struct msm_pinctrl *pctrl = gpiochip_get_data(gc);
>   	const struct msm_pingroup *g = &pctrl->soc->groups[d->hwirq];
> +	unsigned long flags;
>   	int ret;
>   
>   	if (!try_module_get(gc->owner))
> @@ -1233,11 +1234,15 @@ static int msm_gpio_irq_reqres(struct irq_data *d)
>   	if (test_bit(d->hwirq, pctrl->skip_wake_irqs) && g->intr_wakeup_present_bit) {
>   		u32 intr_cfg;
>   
> +		raw_spin_lock_irqsave(&pctrl->lock, flags);
> +
>   		intr_cfg = msm_readl_intr_cfg(pctrl, g);
>   		if (intr_cfg & BIT(g->intr_wakeup_present_bit)) {
>   			intr_cfg |= BIT(g->intr_wakeup_enable_bit);
>   			msm_writel_intr_cfg(intr_cfg, pctrl, g);
>   		}
> +
> +		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
>   	}
>   
>   	return 0;
> @@ -1251,16 +1256,21 @@ static void msm_gpio_irq_relres(struct irq_data *d)
>   	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>   	struct msm_pinctrl *pctrl = gpiochip_get_data(gc);
>   	const struct msm_pingroup *g = &pctrl->soc->groups[d->hwirq];
> +	unsigned long flags;
>   
>   	/* Disable the wakeup_enable bit if it has been set in msm_gpio_irq_reqres() */
>   	if (test_bit(d->hwirq, pctrl->skip_wake_irqs) && g->intr_wakeup_present_bit) {
>   		u32 intr_cfg;
>   
> +		raw_spin_lock_irqsave(&pctrl->lock, flags);
> +
>   		intr_cfg = msm_readl_intr_cfg(pctrl, g);
>   		if (intr_cfg & BIT(g->intr_wakeup_present_bit)) {
>   			intr_cfg &= ~BIT(g->intr_wakeup_enable_bit);
>   			msm_writel_intr_cfg(intr_cfg, pctrl, g);
>   		}
> +
> +		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
>   	}
>   
>   	gpiochip_unlock_as_irq(gc, d->hwirq);
>