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Message-ID: <20231030132523.86123-1-angelogioacchino.delregno@collabora.com>
Date: Mon, 30 Oct 2023 14:25:21 +0100
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: matthias.bgg@...il.com
Cc: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, wenst@...omium.org,
angelogioacchino.delregno@...labora.com,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, kernel@...labora.com
Subject: [PATCH 0/2] MT8195 Cherry: Assign MFG vregs for power saving
This series assigns the right regulators to MFG0 and MFG1, respectively
VGPU (GPU Core) and VSRAM_OTHERS (GPU SRAM), and removes the property
regulator-always-on from both.
This allows to save power both during runtime suspend and during system
sleep; specifically because:
1. The GPU SRAM regulator is switched off during runtime suspend
2. The GPU Core regulator is switched off during system sleep
Of course, in order for those power saving actions to actually take
place, it is required to also have the code in [1].
Anyway, even without series [1], this will not introduce any unstability
as the Vgpu regulator will simply not ever get turned off.
[1]: https://lore.kernel.org/r/20231030132257.85379-1-angelogioacchino.delregno@collabora.com
AngeloGioacchino Del Regno (2):
arm64: dts: mediatek: mt8195-cherry: Add MFG0 domain supply
arm64: dts: mediatek: mt8195-cherry: Assign sram supply to MFG1 pd
arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 10 ++++++++--
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 +-
2 files changed, 9 insertions(+), 3 deletions(-)
--
2.42.0
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