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Message-ID: <57d63309-51cd-4138-889d-43fbdf5ec790@intel.com>
Date:   Mon, 30 Oct 2023 10:18:21 -0700
From:   Dave Hansen <dave.hansen@...el.com>
To:     Nikunj A Dadhania <nikunj@....com>, linux-kernel@...r.kernel.org,
        thomas.lendacky@....com, x86@...nel.org, kvm@...r.kernel.org
Cc:     bp@...en8.de, mingo@...hat.com, tglx@...utronix.de,
        dave.hansen@...ux.intel.com, dionnaglaze@...gle.com,
        pgonda@...gle.com, seanjc@...gle.com, pbonzini@...hat.com
Subject: Re: [PATCH v5 13/14] x86/tsc: Mark Secure TSC as reliable clocksource

On 10/29/23 23:36, Nikunj A Dadhania wrote:
...
> diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
> index 15f97c0abc9d..b0a8546d3703 100644
> --- a/arch/x86/kernel/tsc.c
> +++ b/arch/x86/kernel/tsc.c
> @@ -1241,7 +1241,7 @@ static void __init check_system_tsc_reliable(void)
>  			tsc_clocksource_reliable = 1;
>  	}
>  #endif
> -	if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
> +	if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE) || cc_platform_has(CC_ATTR_GUEST_SECURE_TSC))
>  		tsc_clocksource_reliable = 1;

Why can't you just set X86_FEATURE_TSC_RELIABLE?

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