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Message-ID: <ab57ba73-ce62-43fc-9cb1-d2db1bd13cd9@os.amperecomputing.com>
Date: Mon, 30 Oct 2023 17:12:01 -0700
From: Jan Bottorff <janb@...amperecomputing.com>
To: Wolfram Sang <wsa@...nel.org>,
Jarkko Nikula <jarkko.nikula@...ux.intel.com>,
Serge Semin <fancer.lancer@...il.com>,
Yann Sionneau <ysionneau@...rayinc.com>,
Catalin Marinas <catalin.marinas@....com>,
Yann Sionneau <yann@...nneau.net>,
Will Deacon <will@...nel.org>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Mika Westerberg <mika.westerberg@...ux.intel.com>,
Jan Dabros <jsd@...ihalf.com>,
Andi Shyti <andi.shyti@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] i2c: designware: Fix corrupted memory seen in the ISR
On 10/26/2023 4:18 AM, Wolfram Sang wrote:
> So, someone wants to come up with a patch to move to non-relaxed io
> accessors?
>
Is the current thinking to just make writes to DW_IC_INTR_MASK use the
non-relaxed variant or something more broad?
From a safest functioning viewpoint, we talked about making all
accessors default to non-relaxed variants. A couple of pretty good
arguments from knowledgeable people favored this. I know there also was
some concerns about potential performance impact this might have
although the counter argument was this is a pretty low speed device so
some extra cpu cycles on register accesses were not likely to degrade
overall performance.
I could make the patch if we have consensus (or maintainers decision) on
which way to go: 1) only writes to DW_IC_INTR_MASK are non-relaxed, 2)
make all read/write accessors use the non-relaxed version.
I'm personally in camp #2, safety first, performance fine tuning later
if needed. Latent missing barrier bugs are difficult and time consuming
to find.
- Jan
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