linux-kernel - [RFC PATCH 0/5] Add QPIC SPI NAND driver support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-Id: <20231031120307.1600689-1-quic_mdalam@quicinc.com>
Date:   Tue, 31 Oct 2023 17:33:02 +0530
From:   Md Sadre Alam <quic_mdalam@...cinc.com>
To:     agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
        robh+dt@...nel.org, conor+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, miquel.raynal@...tlin.com,
        richard@....at, vigneshr@...com, broonie@...nel.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-mtd@...ts.infradead.org,
        linux-spi@...r.kernel.org, quic_srichara@...cinc.com,
        qpic_varada@...cinc.com
Cc:     quic_mdalam@...cinc.com
Subject: [RFC PATCH 0/5] Add QPIC SPI NAND driver support

Hi Miquel,

This series is RFC for QPIC NAND driver design for
both SPI NAND and RAW NAND.

We have already discuss this design in the below link

https://patchwork.kernel.org/project/linux-arm-msm/patch/1602307902-16761-3-git-send-email-mdalam@codeaurora.org/#25270814

Since QPIC controller support both raw and as wel as
serial nand, In these patch series I am trying to write
these driver as per above discussion.

As per this design we are having new drivrs for:

1) SPI-NAND Driver
2) RAW-NAND Driver
3) QPIC-COMMON-API Driver
4) ECC ENGINE Driver

Could you plese review these RFC patches and let me know
if i am doing as per design and my code are proper so that
i can proceed further.

I have testd SPI NAND enumeration with this new design.

Command supported currently by spi nand driver
1) RESET
2) READ ID
3) GET FEATURE
4) SET FEATURE

Currently READ_PAGE, WRITE_PAGE are dummy API. Will write
this later on after your review.

One more thisng wanted to add here Since for QPIC ECC engine
its not a separte HW IP, and only one register is there to control ECC
enable/disable. So for just for one register writing a separte driver
is fine or not?
In dt I have added like as below 

 bch: qpic_ecc {
                      compatible = "qcom,ipq9574-ecc";
                      status = "ok";
              };

Is this ok ?

Thanks,
Alam.

Md Sadre Alam (5):
  mtd: nand: ecc-qcom: Add support for ECC Engine Driver
  arm64: dts: qcom: ipq9574: Add ecc engine support
  mtd: nand: qpic_common: Add support for qpic common API
  spi: qpic: Add support for qpic spi nand driver
  arm64: dts: qcom: ipq9574: Add support for SPI nand

 arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts |  56 +-
 arch/arm64/boot/dts/qcom/ipq9574.dtsi       |  33 +
 drivers/mtd/nand/Kconfig                    |   7 +
 drivers/mtd/nand/Makefile                   |   1 +
 drivers/mtd/nand/ecc-qcom.c                 | 198 +++++
 drivers/mtd/nand/qpic_common.c              | 840 ++++++++++++++++++++
 drivers/spi/Kconfig                         |   7 +
 drivers/spi/Makefile                        |   1 +
 drivers/spi/spi-qpic-snand.c                | 604 ++++++++++++++
 include/linux/mtd/nand-qpic-common.h        | 641 +++++++++++++++
 10 files changed, 2360 insertions(+), 28 deletions(-)
 create mode 100644 drivers/mtd/nand/ecc-qcom.c
 create mode 100644 drivers/mtd/nand/qpic_common.c
 create mode 100644 drivers/spi/spi-qpic-snand.c
 create mode 100644 include/linux/mtd/nand-qpic-common.h

-- 
2.34.1