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Message-Id: <20231031121723.5156-1-abelova@astralinux.ru>
Date: Tue, 31 Oct 2023 15:17:22 +0300
From: Anastasia Belova <abelova@...ralinux.ru>
To: Michael Turquette <mturquette@...libre.com>
Cc: Anastasia Belova <abelova@...ralinux.ru>,
Stephen Boyd <sboyd@...nel.org>,
Mike Looijmans <mike.looijmans@...ic.nl>,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
lvc-project@...uxtesting.org
Subject: [PATCH] clk: cdce925: change condition in cdce925_clk_round_rate
To avoid division by zero add check if
divider is zero.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Fixes: 19fbbbbcd3a3 ("Add TI CDCE925 I2C controlled clock synthesizer driver")
Signed-off-by: Anastasia Belova <abelova@...ralinux.ru>
---
drivers/clk/clk-cdce925.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/clk-cdce925.c b/drivers/clk/clk-cdce925.c
index 96ac90364847..d903cdc3ad7d 100644
--- a/drivers/clk/clk-cdce925.c
+++ b/drivers/clk/clk-cdce925.c
@@ -441,7 +441,7 @@ static long cdce925_clk_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long l_parent_rate = *parent_rate;
u16 divider = cdce925_calc_divider(rate, l_parent_rate);
- if (l_parent_rate / divider != rate) {
+ if (divider && l_parent_rate / divider != rate) {
l_parent_rate = cdce925_clk_best_parent_rate(hw, rate);
divider = cdce925_calc_divider(rate, l_parent_rate);
*parent_rate = l_parent_rate;
--
2.30.2
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