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Message-ID: <7fa02dd1-c894-4980-8439-4dc1e22d3634@lunn.ch>
Date: Tue, 31 Oct 2023 13:38:31 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Mirsad Todorovac <mirsad.todorovac@....unizg.hr>
Cc: Heiner Kallweit <hkallweit1@...il.com>, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, nic_swsd@...ltek.com,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>, Marco Elver <elver@...gle.com>
Subject: Re: [PATCH v3 1/1] r8169: Coalesce RTL8411b PHY power-down recovery
programming instructions to reduce spinlock stalls
On Tue, Oct 31, 2023 at 04:35:19AM +0100, Mirsad Todorovac wrote:
> On 10/31/23 02:21, Andrew Lunn wrote:
> > > I will not contradict, but the cummulative amount of memory barriers on each MMIO read/write
> > > in each single one of the drivers could amount to some degrading of overall performance and
> > > latency in a multicore system.
> >
> > For optimisations, we like to see benchmark results which show some
> > improvements. Do you have any numbers?
>
> Hi, Andrew,
>
> Thank you for your interest in RTL NIC driver optimisations.
>
> My knowledge about the timing costs of synchronisation is mostly theoretical.
The kernel tends to be very practical. Maybe try to turn the
theoretical knowledge into practice. Write a benchmark test, or see if
any of the existing RT Linux tests show there is a real problem here,
and your changes fix it.
Andrew
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