linux-kernel - Re: [PATCH v2 7/8] dt-bindings: arm: Add support for TPDM CMB MSR register

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Message-ID: <aded6ef6-fdfa-45ee-bae6-a57a8448eb5b@quicinc.com>
Date:   Wed, 1 Nov 2023 15:10:49 +0800
From:   Tao Zhang <quic_taozha@...cinc.com>
To:     Rob Herring <robh@...nel.org>
CC:     Mathieu Poirier <mathieu.poirier@...aro.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Konrad Dybcio <konradybcio@...il.com>,
        Mike Leach <mike.leach@...aro.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Jinlong Mao <quic_jinlmao@...cinc.com>,
        Leo Yan <leo.yan@...aro.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        <coresight@...ts.linaro.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
        Tingwei Zhang <quic_tingweiz@...cinc.com>,
        Yuanfang Zhang <quic_yuanfang@...cinc.com>,
        Trilok Soni <quic_tsoni@...cinc.com>,
        Song Chai <quic_songchai@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>, <andersson@...nel.org>
Subject: Re: [PATCH v2 7/8] dt-bindings: arm: Add support for TPDM CMB MSR
 register


On 10/27/2023 5:27 AM, Rob Herring wrote:
> On Wed, Oct 25, 2023 at 10:53:27AM +0800, Tao Zhang wrote:
>> Add property "qcom,cmb_msr_num" to support CMB MSR(mux select register)
>> for TPDM. It specifies the number of CMB MSR registers supported by
>> the TDPM.
>>
>> Signed-off-by: Tao Zhang <quic_taozha@...cinc.com>
>> Signed-off-by: Mao Jinlong <quic_jinlmao@...cinc.com>
>> ---
>>   Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml | 10 ++++++++++
>>   1 file changed, 10 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
>> index f9a2025..a586b80a 100644
>> --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
>> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
>> @@ -69,6 +69,15 @@ properties:
>>       minimum: 0
>>       maximum: 32
>>   
>> +  qcom,cmb-msrs-num:
>> +    description:
>> +      Specifies the number of CMB MSR(mux select register) registers supported
>> +      by the monitor. If this property is not configured or set to 0, it means
>> +      this TPDM doesn't support CMB MSR.
>> +    $ref: /schemas/types.yaml#/definitions/uint32
>> +    minimum: 0
>> +    maximum: 32
> default: 0

If the TPDM doesn't support CMB MSR, we will not configure this 
property. Set to 0 to indicate

that CMB MSR is not supported and is only an optional method.

Is it necessary to add this "default" value here?


Best,

Tao

>> +
>>     clocks:
>>       maxItems: 1
>>   
>> @@ -124,6 +133,7 @@ examples:
>>         reg-names = "tpdm-base";
>>   
>>         qcom,cmb-element-size = /bits/ 8 <64>;
>> +      qcom,cmb-msrs-num = <32>;
>>   
>>         clocks = <&aoss_qmp>;
>>         clock-names = "apb_pclk";
>> -- 
>> 2.7.4
>>