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Message-ID: <20231101155153.2767482-2-ben.wolsieffer@hefring.com>
Date: Wed, 1 Nov 2023 11:51:54 -0400
From: Ben Wolsieffer <ben.wolsieffer@...ring.com>
To: linux-stm32@...md-mailman.stormreply.com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Cc: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Ben Wolsieffer <ben.wolsieffer@...ring.com>
Subject: [PATCH] ARM: dts: stm32: add STM32F746 syscfg clock
The syscfg syscon was missing its clock, therefore any attempt to
read/write it after clk_disable_unused() silently failed. This was
preventing external pin interrupts from working if they were initialized
after this point.
Signed-off-by: Ben Wolsieffer <ben.wolsieffer@...ring.com>
---
arch/arm/boot/dts/st/stm32f746.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm32f746.dtsi
index 4942753d011e..cce6ab0e4617 100644
--- a/arch/arm/boot/dts/st/stm32f746.dtsi
+++ b/arch/arm/boot/dts/st/stm32f746.dtsi
@@ -501,6 +501,7 @@ sdio1: mmc@...12c00 {
syscfg: syscon@...13800 {
compatible = "st,stm32-syscfg", "syscon";
reg = <0x40013800 0x400>;
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(SYSCFG)>;
};
exti: interrupt-controller@...13c00 {
--
2.42.0
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