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Message-Id: <20231102193121.1676000-3-hugo@hugovil.com>
Date: Thu, 2 Nov 2023 15:31:20 -0400
From: Hugo Villeneuve <hugo@...ovil.com>
To: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, shawnguo@...nel.org, s.hauer@...gutronix.de,
kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
leoyang.li@....com, robh@...nel.org
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, hugo@...ovil.com,
Hugo Villeneuve <hvilleneuve@...onoff.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH v3 2/3] dt-bindings: arm: fsl: add RVE gateway board
From: Hugo Villeneuve <hvilleneuve@...onoff.com>
Add DT compatible string for RVE gateway board based on a Variscite
VAR-SOM-NANO with a NXP MX8MN nano CPU.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Signed-off-by: Hugo Villeneuve <hvilleneuve@...onoff.com>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 32b195852a75..4cef18e46312 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -1018,6 +1018,7 @@ properties:
- fsl,imx8mn-ddr4-evk # i.MX8MN DDR4 EVK Board
- fsl,imx8mn-evk # i.MX8MN LPDDR4 EVK Board
- gw,imx8mn-gw7902 # i.MX8MM Gateworks Board
+ - rve,rve-gateway # i.MX8MN RVE Gateway Board
- const: fsl,imx8mn
- description: Variscite VAR-SOM-MX8MN based boards
--
2.39.2
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