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Message-ID: <ZUQEa1q/R2KBF/3W@aschofie-mobl2>
Date: Thu, 2 Nov 2023 13:19:55 -0700
From: Alison Schofield <alison.schofield@...el.com>
To: Terry Bowman <terry.bowman@....com>
Cc: vishal.l.verma@...el.com, ira.weiny@...el.com, bwidawsk@...nel.org,
dan.j.williams@...el.com, dave.jiang@...el.com,
Jonathan.Cameron@...wei.com, linux-cxl@...r.kernel.org,
Smita.KoralahalliChannabasappa@....com, rrichter@....com,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] cxl/pci: Change CXL AER support check to use native AER
On Thu, Nov 02, 2023 at 10:52:32AM -0500, Terry Bowman wrote:
> Native CXL protocol errors are delivered to the OS through AER
> reporting. The owner of AER owns CXL Protocol error management with
> respect to _OSC negotiation.[1] CXL device errors are handled by a
> separate interrupt with native control gated by _OSC control field
> 'CXL Memory Error Reporting Control'.
>
> The CXL driver incorrectly checks for 'CXL Memory Error Reporting
> Control' before accessing AER registers and caching RCH downport
> AER registers. Replace the current check in these 2 cases with
> native AER checks.
Hi Terry, Does this have a user visible impact?
Alison
>
--snip
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