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Message-ID: <20231102142731.2087245-2-james.tai@realtek.com>
Date: Thu, 2 Nov 2023 22:27:26 +0800
From: James Tai <james.tai@...ltek.com>
To: <linux-kernel@...r.kernel.org>,
<linux-realtek-soc@...ts.infradead.org>
CC: Thomas Gleixner <tglx@...utronix.de>, Marc Zyngier <maz@...nel.org>
Subject: [PATCH 1/6] dt-bindings: interrupt-controller: Add support for Realtek DHC SoCs
Add the YAML documentation for Realtek DHC SoCs.
Change-Id: Ia619582e34fef6b2dbd5f98ba3f5edf70cf11dbf
Signed-off-by: James Tai <james.tai@...ltek.com>
---
.../interrupt-controller/realtek,intc.yaml | 146 ++++++++++++++++++
1 file changed, 146 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/realtek,intc.yaml
diff --git a/Documentation/devicetree/bindings/interrupt-controller/realtek,intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/realtek,intc.yaml
new file mode 100644
index 000000000000..cf063dcdd0b4
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/realtek,intc.yaml
@@ -0,0 +1,146 @@
+# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/realtek,intc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Realtek DHC SoCs Interrupt Controller Device Tree Bindings
+
+description:
+ This interrupt controller is a component of Realtek DHC SoCs and
+ is designed to receive interrupts from peripheral devices.
+
+ Each DHC SoC has two sets of interrupt controllers, each capable of
+ handling up to 32 interrupts.
+
+maintainers:
+ - James Tai <james.tai@...ltek.com>
+
+allOf:
+ - $ref: /schemas/interrupt-controller.yaml#
+
+properties:
+ "#interrupt-cells":
+ const: 1
+
+ compatible:
+ enum:
+ - realtek,rtd1319-intc-iso
+ - realtek,rtd1319-intc-misc
+ - realtek,rtd1319d-intc-iso
+ - realtek,rtd1319d-intc-misc
+ - realtek,rtd1325-intc-iso
+ - realtek,rtd1325-intc-misc
+ - realtek,rtd1619b-intc-iso
+ - realtek,rtd1619b-intc-misc
+
+ "#address-cells":
+ const: 0
+
+ interrupt-controller: true
+
+ interrupts-extended:
+ minItems: 1
+
+ reg:
+ maxItems: 1
+
+required:
+ - "#interrupt-cells"
+ - "#address-cells"
+ - compatible
+ - interrupt-controller
+ - interrupts-extended
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ iso_irq_mux: iso_irq_mux@40 {
+ compatible = "realtek,rtd1319-intc-iso";
+ reg = <0x00 0x40>;
+ interrupts-extended = <&gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+
+ misc_irq_mux: misc_irq_mux@80 {
+ compatible = "realtek,rtd1319-intc-misc";
+ reg = <0x00 0x80>;
+ interrupts-extended = <&gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+
+ iso_irq_mux: iso_irq_mux@40 {
+ compatible = "realtek,rtd1319d-intc-iso";
+ reg = <0x00 0x40>;
+ interrupts-extended = <&gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+
+ misc_irq_mux: misc_irq_mux@80 {
+ compatible = "realtek,rtd1319d-intc-misc";
+ reg = <0x00 0x80>;
+ interrupts-extended = <&gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+
+ iso_irq_mux: iso_irq_mux@40 {
+ compatible = "realtek,rtd1325-intc-iso";
+ reg = <0x00 0x40>;
+ interrupts-extended = <&gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+
+ misc_irq_mux: misc_irq_mux@80 {
+ compatible = "realtek,rtd1325-intc-misc";
+ reg = <0x00 0x80>;
+ interrupts-extended = <&gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+
+ iso_irq_mux: iso_irq_mux@40 {
+ compatible = "realtek,rtd1619b-intc-iso";
+ reg = <0x00 0x40>;
+ interrupts-extended = <&gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+
+ misc_irq_mux: misc_irq_mux@80 {
+ compatible = "realtek,rtd1619b-intc-misc";
+ reg = <0x00 0x80>;
+ interrupts-extended = <&gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+...
--
2.25.1
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