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Message-ID: <c5eb223b-b7b1-c85f-a0d5-ab3cc3e86efa@quicinc.com>
Date: Fri, 3 Nov 2023 16:47:51 +0530
From: Mukesh Ojha <quic_mojha@...cinc.com>
To: Atul Dhudase <quic_adhudase@...cinc.com>, <agross@...nel.org>,
<andersson@...nel.org>, <konrad.dybcio@...aro.org>,
<swboyd@...omium.org>, <isaacm@...eaurora.org>,
<dianders@...omium.org>
CC: <linux-arm-msm@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] soc: qcom: llcc: Fix dis_cap_alloc and retain_on_pc
configuration
On 11/3/2023 4:27 PM, Atul Dhudase wrote:
> While programming dis_cap_alloc and retain_on_pc, set a bit
> corresponding to a specific SCID without disturbing the
> previously configured bits.
>
> Fixes: c14e64b46944 ("soc: qcom: llcc: Support chipsets that can write to llcc")
> Signed-off-by: Atul Dhudase <quic_adhudase@...cinc.com>
> ---
> drivers/soc/qcom/llcc-qcom.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
> index 674abd0d6700..509d972c1bd9 100644
> --- a/drivers/soc/qcom/llcc-qcom.c
> +++ b/drivers/soc/qcom/llcc-qcom.c
> @@ -941,15 +941,15 @@ static int _qcom_llcc_cfg_program(const struct llcc_slice_config *config,
> u32 disable_cap_alloc, retain_pc;
>
> disable_cap_alloc = config->dis_cap_alloc << config->slice_id;
> - ret = regmap_write(drv_data->bcast_regmap,
> - LLCC_TRP_SCID_DIS_CAP_ALLOC, disable_cap_alloc);
> + ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_SCID_DIS_CAP_ALLOC,
> + BIT(config->slice_id), disable_cap_alloc);
> if (ret)
> return ret;
>
> if (drv_data->version < LLCC_VERSION_4_1_0_0) {
> retain_pc = config->retain_on_pc << config->slice_id;
> - ret = regmap_write(drv_data->bcast_regmap,
> - LLCC_TRP_PCB_ACT, retain_pc);
> + ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_PCB_ACT,
> + BIT(config->slice_id), retain_pc);
Good catch, LGTM
Thanks
-Mukesh
> if (ret)
> return ret;
> }
> --
> 2.25.1
>
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