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Message-ID: <20231103190758.82911-10-mario.limonciello@amd.com>
Date: Fri, 3 Nov 2023 14:07:58 -0500
From: Mario Limonciello <mario.limonciello@....com>
To: Karol Herbst <kherbst@...hat.com>, Lyude Paul <lyude@...hat.com>,
"Alex Deucher" <alexander.deucher@....com>,
Christian König <christian.koenig@....com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
"Hans de Goede" <hdegoede@...hat.com>,
Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
Mika Westerberg <mika.westerberg@...ux.intel.com>,
Lukas Wunner <lukas@...ner.de>
CC: Danilo Krummrich <dakr@...hat.com>,
David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Xinhui Pan <Xinhui.Pan@....com>,
"Rafael J . Wysocki" <rafael@...nel.org>,
Mark Gross <markgross@...nel.org>,
"Andreas Noever" <andreas.noever@...il.com>,
Michael Jamet <michael.jamet@...el.com>,
Yehezkel Bernat <YehezkelShB@...il.com>,
Pali Rohár <pali@...nel.org>,
Marek Behún <kabel@...nel.org>,
"Maciej W . Rozycki" <macro@...am.me.uk>,
Manivannan Sadhasivam <mani@...nel.org>,
Mario Limonciello <mario.limonciello@....com>,
"open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS"
<dri-devel@...ts.freedesktop.org>,
"open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS"
<nouveau@...ts.freedesktop.org>,
"open list" <linux-kernel@...r.kernel.org>,
"open list:RADEON and AMDGPU DRM DRIVERS"
<amd-gfx@...ts.freedesktop.org>,
"open list:PCI SUBSYSTEM" <linux-pci@...r.kernel.org>,
"open list:ACPI" <linux-acpi@...r.kernel.org>,
"open list:X86 PLATFORM DRIVERS"
<platform-driver-x86@...r.kernel.org>,
"open list:THUNDERBOLT DRIVER" <linux-usb@...r.kernel.org>
Subject: [PATCH v2 9/9] PCI: Add a quirk to mark 0x8086 : 0x9a23 as supporting PCIe tunneling
The PCI root port used for tunneling USB4 traffic on Tiger Lake is
is not marked as tunneling but has the same limitations as other
PCIe root ports used for tunneling.
This causes pcie_bandwidth_available() to treat it as the limiting
device in the PCI hierarchy and downstream driver to program devices
incorrectly as a result.
Add a quirk to mark the device as tunneling so that it will be skipped
in pcie_bandwidth_available() like other TBT3/USB4 root ports and bridges.
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2885
Signed-off-by: Mario Limonciello <mario.limonciello@....com>
---
drivers/pci/quirks.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 4bbf6e33ca11..0f124e075834 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3827,6 +3827,17 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C
quirk_thunderbolt_command_complete);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PORT_RIDGE,
quirk_thunderbolt_command_complete);
+
+/*
+ * PCIe root port associated with the integrated controller is used for PCIe
+ * tunneling but can't be detected using ACPI.
+ */
+static void quirk_thunderbolt_tunneling(struct pci_dev *pdev)
+{
+ pdev->is_tunneled = 1;
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x9a23,
+ quirk_thunderbolt_tunneling);
#ifdef CONFIG_ACPI
/*
* Apple: Shutdown Cactus Ridge Thunderbolt controller.
--
2.34.1
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