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Message-ID: <d419893f-3167-4a8f-aa4e-06e8ecd390d1@amd.com>
Date: Mon, 6 Nov 2023 16:15:59 +0530
From: "Nikunj A. Dadhania" <nikunj@....com>
To: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Cc: Tom Lendacky <thomas.lendacky@....com>,
linux-kernel@...r.kernel.org, x86@...nel.org, kvm@...r.kernel.org,
bp@...en8.de, mingo@...hat.com, tglx@...utronix.de,
dave.hansen@...ux.intel.com, dionnaglaze@...gle.com,
pgonda@...gle.com, seanjc@...gle.com, pbonzini@...hat.com
Subject: Re: [PATCH v5 09/14] x86/sev: Add Secure TSC support for SNP guests
On 11/2/2023 4:06 PM, Kirill A. Shutemov wrote:
> On Thu, Nov 02, 2023 at 11:11:52AM +0530, Nikunj A. Dadhania wrote:
>> On 10/31/2023 1:56 AM, Tom Lendacky wrote:
>>>> diff --git a/include/linux/cc_platform.h b/include/linux/cc_platform.h
>>>> index cb0d6cd1c12f..e081ca4d5da2 100644
>>>> --- a/include/linux/cc_platform.h
>>>> +++ b/include/linux/cc_platform.h
>>>> @@ -90,6 +90,14 @@ enum cc_attr {
>>>> * Examples include TDX Guest.
>>>> */
>>>> CC_ATTR_HOTPLUG_DISABLED,
>>>> +
>>>> + /**
>>>> + * @CC_ATTR_GUEST_SECURE_TSC: Secure TSC is active.
>>>> + *
>>>> + * The platform/OS is running as a guest/virtual machine and actively
>>>> + * using AMD SEV-SNP Secure TSC feature.
>>>
>>> I think TDX also has a secure TSC like feature, so can this be generic?
>>
>> Yes, we can do that. In SNP case SecureTSC is an optional feature, not sure if that is the case for TDX as well.
>>
>> Kirill any inputs ?
>
> We have several X86_FEATURE_ flags to indicate quality of TSC. Do we
> really need a CC_ATTR on top of that? Maybe SEV code could just set
> X86_FEATURE_ according to what its TSC can do?
For SEV-SNP, SEV_STATUS MSR has the information of various features
that have been enabled by the hypervisor. We will need a CC_ATTR for
these optional features.
Regards
Nikunj
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