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Message-ID: <ZUtSxNviS1w+yVYV@ninjato>
Date:   Wed, 8 Nov 2023 10:20:04 +0100
From:   Wolfram Sang <wsa@...nel.org>
To:     Tam Nguyen <tamnguyenchi@...amperecomputing.com>
Cc:     linux-kernel@...r.kernel.org, linux-i2c@...r.kernel.org,
        patches@...erecomputing.com, jarkko.nikula@...ux.intel.com,
        andriy.shevchenko@...ux.intel.com, mika.westerberg@...ux.intel.com,
        jsd@...ihalf.com, chuong@...amperecomputing.com,
        darren@...amperecomputing.com, stable@...r.kernel.org
Subject: Re: [PATCH v2] i2c: designware: Disable TX_EMPTY irq while waiting
 for block length byte

On Thu, Nov 02, 2023 at 10:30:08AM +0700, Tam Nguyen wrote:
> During SMBus block data read process, we have seen high interrupt rate
> because of TX_EMPTY irq status while waiting for block length byte (the
> first data byte after the address phase). The interrupt handler does not
> do anything because the internal state is kept as STATUS_WRITE_IN_PROGRESS.
> Hence, we should disable TX_EMPTY IRQ until I2C DesignWare receives
> first data byte from I2C device, then re-enable it to resume SMBus
> transaction.
> 
> It takes 0.789 ms for host to receive data length from slave.
> Without the patch, i2c_dw_isr() is called 99 times by TX_EMPTY interrupt.
> And it is none after applying the patch.
> 
> Cc: stable@...r.kernel.org
> Co-developed-by: Chuong Tran <chuong@...amperecomputing.com>
> Signed-off-by: Chuong Tran <chuong@...amperecomputing.com>
> Signed-off-by: Tam Nguyen <tamnguyenchi@...amperecomputing.com>

Applied to for-current, thanks!


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