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Message-Id: <169945622394.21527.3124390235718223224.git-patchwork-notify@kernel.org>
Date: Wed, 08 Nov 2023 15:10:23 +0000
From: patchwork-bot+linux-riscv@...nel.org
To: Evan Green <evan@...osinc.com>
Cc: linux-riscv@...ts.infradead.org, palmer@...osinc.com,
apatel@...tanamicro.com, aou@...s.berkeley.edu, heiko@...ech.de,
leyfoon.tan@...rfivetech.com, maz@...nel.org,
bigeasy@...utronix.de, paul.walmsley@...ive.com,
linux-kernel@...r.kernel.org, conor.dooley@...rochip.com,
David.Laight@...lab.com, palmer@...belt.com, jszhang@...nel.org,
greentime.hu@...ive.com, cleger@...osinc.com,
ajones@...tanamicro.com
Subject: Re: [PATCH v3] RISC-V: Probe misaligned access speed in parallel
Hello:
This patch was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@...osinc.com>:
On Mon, 6 Nov 2023 14:58:55 -0800 you wrote:
> Probing for misaligned access speed takes about 0.06 seconds. On a
> system with 64 cores, doing this in smp_callin() means it's done
> serially, extending boot time by 3.8 seconds. That's a lot of boot time.
>
> Instead of measuring each CPU serially, let's do the measurements on
> all CPUs in parallel. If we disable preemption on all CPUs, the
> jiffies stop ticking, so we can do this in stages of 1) everybody
> except core 0, then 2) core 0. The allocations are all done outside of
> on_each_cpu() to avoid calling alloc_pages() with interrupts disabled.
>
> [...]
Here is the summary with links:
- [v3] RISC-V: Probe misaligned access speed in parallel
https://git.kernel.org/riscv/c/55e0bf49a0d0
You are awesome, thank you!
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