[<prev] [next>] [day] [month] [year] [list]
Message-ID: <202311100254.i2Rgql3X-lkp@intel.com>
Date: Fri, 10 Nov 2023 02:49:19 +0800
From: kernel test robot <lkp@...el.com>
To: Shubhrajyoti Datta <shubhrajyoti.datta@....com>
Cc: oe-kbuild-all@...ts.linux.dev, linux-kernel@...r.kernel.org,
"Borislav Petkov (AMD)" <bp@...en8.de>,
Sai Krishna Potthuri <sai.krishna.potthuri@....com>
Subject: drivers/edac/versal_edac.c:745:21: sparse: sparse: incorrect type in
argument 1 (different address spaces)
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 6bc986ab839c844e78a2333a02e55f02c9e57935
commit: 6f15b178cd6315c997981f76c6ebed7ad39144c5 EDAC/versal: Add a Xilinx Versal memory controller driver
date: 2 weeks ago
config: arm64-randconfig-r121-20231109 (https://download.01.org/0day-ci/archive/20231110/202311100254.i2Rgql3X-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 13.2.0
reproduce: (https://download.01.org/0day-ci/archive/20231110/202311100254.i2Rgql3X-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202311100254.i2Rgql3X-lkp@intel.com/
sparse warnings: (new ones prefixed by >>)
>> drivers/edac/versal_edac.c:745:21: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected char const * @@ got char const [noderef] __user *data @@
drivers/edac/versal_edac.c:745:21: sparse: expected char const *
drivers/edac/versal_edac.c:745:21: sparse: got char const [noderef] __user *data
vim +745 drivers/edac/versal_edac.c
736
737 static ssize_t xddr_inject_data_poison_store(struct mem_ctl_info *mci,
738 const char __user *data)
739 {
740 struct edac_priv *priv = mci->pvt_info;
741
742 writel(0, priv->ddrmc_baseaddr + ECCW0_FLIP0_OFFSET);
743 writel(0, priv->ddrmc_baseaddr + ECCW1_FLIP0_OFFSET);
744
> 745 if (strncmp(data, "CE", 2) == 0) {
746 writel(ECC_CEPOISON_MASK, priv->ddrmc_baseaddr +
747 ECCW0_FLIP0_OFFSET);
748 writel(ECC_CEPOISON_MASK, priv->ddrmc_baseaddr +
749 ECCW1_FLIP0_OFFSET);
750 } else {
751 writel(ECC_UEPOISON_MASK, priv->ddrmc_baseaddr +
752 ECCW0_FLIP0_OFFSET);
753 writel(ECC_UEPOISON_MASK, priv->ddrmc_baseaddr +
754 ECCW1_FLIP0_OFFSET);
755 }
756
757 /* Lock the PCSR registers */
758 writel(1, priv->ddrmc_baseaddr + XDDR_PCSR_OFFSET);
759
760 return 0;
761 }
762
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
Powered by blists - more mailing lists