linux-kernel - Re: [PATCH] mmc: sdhci-pci-gli: Disable LPM during initialization

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Message-ID: <CAG-rBijqw2VO8AQbwBh5Cu47gBbDsOGwPgw-8hSXMWCHXi6GLw@mail.gmail.com>
Date:   Thu, 9 Nov 2023 14:19:14 -0500
From:   Sven van Ashbrook <svenva@...omium.org>
To:     Kornel Dulęba <korneld@...omium.org>
Cc:     Ulf Hansson <ulf.hansson@...aro.org>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Jason Lai <jasonlai.genesyslogic@...il.com>,
        Victor Shih <victor.shih@...esyslogic.com.tw>,
        Ben Chuang <ben.chuang@...esyslogic.com.tw>,
        Stanisław Kardach <skardach@...gle.com>,
        linux-kernel@...r.kernel.org, linux-mmc@...r.kernel.org,
        stable@...r.kernel.org
Subject: Re: [PATCH] mmc: sdhci-pci-gli: Disable LPM during initialization

Hi Kornel, see below.

On Thu, Nov 9, 2023 at 6:20 AM Kornel Dulęba <korneld@...omium.org> wrote:
>
> To address IO performance commit f9e5b33934ce
> ("mmc: host: Improve I/O read/write performance for GL9763E")
> limited LPM negotiation to runtime suspend state.
> The problem is that it only flips the switch in the runtime PM
> resume/suspend logic.
>
> Disable LPM negotiation in gl9763e_add_host.
> This helps in two ways:
> 1. It was found that the LPM switch stays in the same position after
>    warm reboot. Having it set in init helps with consistency.
> 2. Disabling LPM during the first runtime resume leaves us susceptible
>    to the performance issue in the time window between boot and the
>    first runtime suspend.
>
> Fixes: f9e5b33934ce ("mmc: host: Improve I/O read/write performance for GL9763E")
> Cc: stable@...r.kernel.org
> Signed-off-by: Kornel Dulęba <korneld@...omium.org>
> ---
>  drivers/mmc/host/sdhci-pci-gli.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> index d83261e857a5..ce91d1e63a8e 100644
> --- a/drivers/mmc/host/sdhci-pci-gli.c
> +++ b/drivers/mmc/host/sdhci-pci-gli.c
> @@ -220,6 +220,9 @@
>
>  #define GLI_MAX_TUNING_LOOP 40
>
> +static void gl9763e_set_low_power_negotiation(struct sdhci_pci_slot *slot,
> +                                             bool enable);
> +
>  /* Genesys Logic chipset */
>  static inline void gl9750_wt_on(struct sdhci_host *host)
>  {
> @@ -1281,6 +1284,9 @@ static int gl9763e_add_host(struct sdhci_pci_slot *slot)
>         if (ret)
>                 goto cleanup;
>
> +       /* Disable LPM negotiation to avoid entering L1 state. */
> +       gl9763e_set_low_power_negotiation(slot, false);
> +
>         return 0;

What happens if the bridge is not driving the system rootfs? Imagine
the case where
the bridge is used to drive an auxiliary eMMC, unused until a few hours
after boot. After this patch, the bridge may remain active (not-L1)
for the entire time,
although it's not being used...

I suspect we want the following:
1. consistency - LPM register setting and runtime_pm state must agree
2. power-efficient initial state - bridge must come out of probe
runtime-suspended
and LPM must be enabled

I suspect the above will be fulfilled if we do

+ /* Bring to consistent runtime suspended state with LPM negotiation enabled */
+ gl9763e_set_low_power_negotiation(slot, false);
+ pm_runtime_set_suspended(dev);

WDYT?

>
>  cleanup:
> @@ -1323,7 +1329,6 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
>         pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
>  }
>
> -#ifdef CONFIG_PM
>  static void gl9763e_set_low_power_negotiation(struct sdhci_pci_slot *slot, bool enable)
>  {
>         struct pci_dev *pdev = slot->chip->pdev;
> @@ -1349,6 +1354,7 @@ static void gl9763e_set_low_power_negotiation(struct sdhci_pci_slot *slot, bool
>         pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
>  }
>
> +#ifdef CONFIG_PM
>  static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip)
>  {
>         struct sdhci_pci_slot *slot = chip->slots[0];
> --
> 2.42.0.869.gea05f2083d-goog
>