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Message-Id: <20231110072531.1957891-1-xiaolei.wang@windriver.com>
Date:   Fri, 10 Nov 2023 15:25:31 +0800
From:   Xiaolei Wang <xiaolei.wang@...driver.com>
To:     robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        conor+dt@...nel.org, kernel@...gutronix.de, shawnguo@...nel.org,
        festevam@...il.com, linux-imx@....com, Frank.Li@....com,
        marcel.ziswiler@...adex.com, qiangqing.zhang@....com,
        s.hauer@...gutronix.de
Cc:     devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH] arm64: dts: imx8qm: Add imx8qm's own pm to avoid panic during startup

Add imx8qm's own pm, otherwise the following panic will
occur during the startup process:

 Kernel panic - not syncing: Asynchronous SError Interrupt
 Hardware name: Freescale i.MX8QM MEK (DT)
 Workqueue: events_unbound deferred_probe_work_func
 Call trace:
  dump_backtrace+0x98/0xf0
  show_stack+0x18/0x24
  dump_stack_lvl+0x60/0xac
  dump_stack+0x18/0x24
  panic+0x340/0x3a0
  nmi_panic+0x8c/0x90
  arm64_serror_panic+0x6c/0x78
  do_serror+0x3c/0x78
  el1h_64_error_handler+0x38/0x50
  el1h_64_error+0x64/0x68
  fsl_edma_chan_mux+0x98/0xdc
  fsl_edma_probe+0x278/0x898
  platform_probe+0x68/0xd8
  really_probe+0x110/0x27c
  __driver_probe_device+0x78/0x12c
  driver_probe_device+0x3c/0x118
  __device_attach_driver+0xb8/0xf8
  bus_for_each_drv+0x84/0xe4
  __device_attach+0xfc/0x18c
  device_initial_probe+0x14/0x20

Fixes: e4d7a330fb7a ("arm64: dts: imx8: add edma[0..3]")
Signed-off-by: Xiaolei Wang <xiaolei.wang@...driver.com>
---
 arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
index 01539df335f8..8439dd6b3935 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
@@ -96,6 +96,17 @@ &edma2 {
 	status = "okay";
 };
 
+&edma3 {
+	power-domains = <&pd IMX_SC_R_DMA_1_CH0>,
+		     <&pd IMX_SC_R_DMA_1_CH1>,
+		     <&pd IMX_SC_R_DMA_1_CH2>,
+		     <&pd IMX_SC_R_DMA_1_CH3>,
+		     <&pd IMX_SC_R_DMA_1_CH4>,
+		     <&pd IMX_SC_R_DMA_1_CH5>,
+		     <&pd IMX_SC_R_DMA_1_CH6>,
+		     <&pd IMX_SC_R_DMA_1_CH7>;
+};
+
 &flexcan1 {
 	fsl,clk-source = /bits/ 8 <1>;
 };
-- 
2.25.1

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