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Message-Id: <20231112061514.2306187-33-guoren@kernel.org>
Date: Sun, 12 Nov 2023 01:15:08 -0500
From: guoren@...nel.org
To: arnd@...db.de, guoren@...nel.org, palmer@...osinc.com,
tglx@...utronix.de, conor.dooley@...rochip.com, heiko@...ech.de,
apatel@...tanamicro.com, atishp@...shpatra.org, bjorn@...nel.org,
paul.walmsley@...ive.com, anup@...infault.org, jiawei@...as.ac.cn,
liweiwei@...as.ac.cn, wefu@...hat.com, U2FsdGVkX1@...il.com,
wangjunqiang@...as.ac.cn, kito.cheng@...ive.com,
andy.chiu@...ive.com, vincent.chen@...ive.com,
greentime.hu@...ive.com, wuwei2016@...as.ac.cn, jrtc27@...c27.com,
luto@...nel.org, fweimer@...hat.com, catalin.marinas@....com,
hjl.tools@...il.com
Cc: linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org, Guo Ren <guoren@...ux.alibaba.com>
Subject: [RFC PATCH V2 32/38] riscv: s64ilp32: Validate harts by architecture name
From: Guo Ren <guoren@...ux.alibaba.com>
When rv64ilp32 was introduced, the 32BIT would work with rv64,isa. So
use the architecture name instead of the ABI width name. This is an
addition to the commit: 069b0d517077 ("RISC-V: validate riscv,isa at
boot, not during ISA string parsing").
Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
Signed-off-by: Guo Ren <guoren@...nel.org>
---
arch/riscv/kernel/cpu.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index bc39fd16ab64..3c06ffc00fe0 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -66,10 +66,11 @@ int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *har
return -ENODEV;
}
- if (IS_ENABLED(CONFIG_32BIT) && strncasecmp(isa, "rv32ima", 7))
+ if (IS_ENABLED(CONFIG_RV32I) && strncasecmp(isa, "rv32ima", 7))
return -ENODEV;
- if (IS_ENABLED(CONFIG_64BIT) && strncasecmp(isa, "rv64ima", 7))
+ if ((IS_ENABLED(CONFIG_RV64I) || IS_ENABLED(CONFIG_RV64IILP32))
+ && strncasecmp(isa, "rv64ima", 7))
return -ENODEV;
return 0;
--
2.36.1
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