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Message-ID: <6610e454-2fda-4a2b-b088-88237685ea49@starfivetech.com>
Date: Mon, 13 Nov 2023 17:47:13 +0800
From: William Qiu <william.qiu@...rfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-riscv@...ts.infradead.org>, <linux-pwm@...r.kernel.org>
CC: Emil Renner Berthing <kernel@...il.dk>,
Rob Herring <robh+dt@...nel.org>,
Thierry Reding <thierry.reding@...il.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Uwe Kleine-König <u.kleine-koenig@...gutronix.de>,
Hal Feng <hal.feng@...rfivetech.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
"Palmer Dabbelt" <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>
Subject: Re: [PATCH v7 2/4] pwm: opencores: Add PWM driver support
On 2023/11/10 20:27, Krzysztof Kozlowski wrote:
> On 10/11/2023 07:20, William Qiu wrote:
>> Add Pulse Width Modulation driver support for OpenCores.
>
> What is OpenCores? Why all your commit messages lack basic explanation
> of the hardware you are working on?
>
Will modify.
>>
>
>
>> +static const struct ocores_pwm_data jh7100_pwm_data = {
>> + .get_ch_base = starfive_jh71x0_get_ch_base,
>> +};
>> +
>> +static const struct ocores_pwm_data jh7110_pwm_data = {
>> + .get_ch_base = starfive_jh71x0_get_ch_base,
>> +};
>> +
>> +static const struct of_device_id ocores_pwm_of_match[] = {
>> + { .compatible = "opencores,pwm" },
>> + { .compatible = "starfive,jh7100-pwm", .data = &jh7100_pwm_data},
>> + { .compatible = "starfive,jh7110-pwm", .data = &jh7110_pwm_data},
>
> Your bindings say something entirely else.
>
> I don't understand what is happening with this patchset.
>
Will update.
>
>> + { /* sentinel */ }
>> +};
>
> ...
>
>> + ddata->regs = devm_platform_ioremap_resource(pdev, 0);
>> + if (IS_ERR(ddata->regs))
>> + return dev_err_probe(dev, PTR_ERR(ddata->regs),
>> + "Unable to map IO resources\n");
>> +
>> + ddata->clk = devm_clk_get(dev, NULL);
>> + if (IS_ERR(ddata->clk))
>> + return dev_err_probe(dev, PTR_ERR(ddata->clk),
>> + "Unable to get pwm's clock\n");
>> +
>> + ret = clk_prepare_enable(ddata->clk);
>> + if (ret)
>> + return dev_err_probe(dev, ret, "Clock enable failed\n");
>
> dev_clk_get_enabled() or whatever the API is called
>
You mean change devm_clk_get_enabled() instead of devm_clk_get()?
>> +
>> + ddata->rst = devm_reset_control_get_optional_exclusive(dev, NULL);
>> + reset_control_deassert(ddata->rst);
>> +
>> + ddata->clk_rate = clk_get_rate(ddata->clk);
>> + if (ddata->clk_rate <= 0)
>> + return dev_err_probe(dev, ddata->clk_rate,
>> + "Unable to get clock's rate\n");
>> +
>> + ret = devm_pwmchip_add(dev, chip);
>> + if (ret < 0) {
>> + dev_err_probe(dev, ret, "Could not register PWM chip\n");
>> + clk_disable_unprepare(ddata->clk);
>> + reset_control_assert(ddata->rst);
>
> return dev_err_probe
>
Will update.
>> + }
>> +
>> + platform_set_drvdata(pdev, ddata);
>> +
>> + return ret;
>> +}
>> +
>> +static void ocores_pwm_remove(struct platform_device *dev)
>> +{
>> + struct ocores_pwm_device *ddata = platform_get_drvdata(dev);
>> +
>> + reset_control_assert(ddata->rst);
>> + clk_disable_unprepare(ddata->clk);
>
> You have confusing order of cleanups. It's like random, once clock then
> reset, in other place reset then clock.
>
Will change it into a reasonable order.
Thank you for spending time on this patchset.
Best Regards,
William
> Best regards,
> Krzysztof
>
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