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Message-ID: <be9a9d55-acbe-4d31-8aa9-cb0ed5945919@linaro.org>
Date: Tue, 14 Nov 2023 22:13:19 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Jisheng Zhang <jszhang@...nel.org>, Conor Dooley <conor@...nel.org>
Cc: Philipp Zabel <p.zabel@...gutronix.de>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Chao Wei <chao.wei@...hgo.com>,
Chen Wang <unicorn_wang@...look.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: Re: [PATCH 1/4] dt-bindings: reset: Add binding for Sophgo CV1800B
reset controller
On 13/11/2023 15:00, Jisheng Zhang wrote:
> On Mon, Nov 13, 2023 at 01:36:54PM +0000, Conor Dooley wrote:
>> On Mon, Nov 13, 2023 at 08:55:00AM +0800, Jisheng Zhang wrote:
>>> Add devicetree binding for Sophgo CV1800B SoC reset controller.
>>>
>>> Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
>>
>> With the unterminated ifndef that was pointed out by the robots fixed,
>> Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
>>
>>> +/* 0-1 */
>>> +/* 10 */
>>> +/* 13 */
>>> +/* 15 */
>>> +/* 17 */
>>> +/* 36-39 */
>>> +/* 53-57 */
>>> +/* 59-60 */
>>> +/* 63-73 */
>>> +/* 90 */
>>> +/* 94 */
>>> +/* 102-292 */
>>
>> There are quite a lot of gaps here, do you know why that is?
>
> The tail bits are for cpusys, so I guess the SoC designer want to
> seperate them with guard? I'm not sure.
>
There is misunderstanding here. You add here IDs, which are abstract.
Any gaps do not make any sense for bindings.
Best regards,
Krzysztof
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