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Message-ID: <SA1PR11MB67340C23AF350C8CB4119090A8B2A@SA1PR11MB6734.namprd11.prod.outlook.com>
Date: Tue, 14 Nov 2023 05:58:32 +0000
From: "Li, Xin3" <xin3.li@...el.com>
To: Borislav Petkov <bp@...en8.de>
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Subject: RE: [PATCH v12 01/37] x86/cpufeatures: Add the cpu feature bit for
WRMSRNS
> and if you had to be precise, the code should do:
>
> if (cpu_feature_enabled(X86_FEATURE_FRED)) {
> if (cpu_feature_enabled(X86_FEATURE_WRMSRNS))
> wrmsrns(MSR_IA32_FRED_RSP0, (unsigned
> long)task_stack_page(task) + THREAD_SIZE);
> else
> wrmsr(MSR_IA32_FRED_RSP0, (unsigned
> long)task_stack_page(task) + THREAD_SIZE);
> }
This is exactly what tglx wanted to avoid.
And I love the idea "baseline", especially we have a ton of CPU features.
>
> > Another patch set should replace WRMSR with WRMSRNS, with SERIALIZE
> > added when needed.
>
> I sense someone wants to optimize MSR writes ... :-)
:-)
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