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Message-Id: <20231114113356.127779-1-jose.pekkarinen@foxhound.fi>
Date:   Tue, 14 Nov 2023 13:33:56 +0200
From:   José Pekkarinen <jose.pekkarinen@...hound.fi>
To:     harry.wentland@....com, sunpeng.li@....com,
        Rodrigo.Siqueira@....com, alexander.deucher@....com,
        christian.koenig@....com, Xinhui.Pan@....com,
        skhan@...uxfoundation.org
Cc:     José Pekkarinen <jose.pekkarinen@...hound.fi>,
        airlied@...il.com, daniel@...ll.ch, Qingqing.Zhuo@....com,
        charlene.liu@....com, stylon.wang@....com,
        yang.lee@...ux.alibaba.com, daniel.miess@....com,
        colin.i.king@...il.com, amd-gfx@...ts.freedesktop.org,
        dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
        linux-kernel-mentees@...ts.linux.dev
Subject: [PATCH] drm/amd/display: fix ptr comparison to 0

This patch will address the following coccinelle warning where a pointer
is compared to 0 instead of NULL.

drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c:5423:19-20: WARNING comparing pointer to 0

Fixes: 7966f319c66d9 ("drm/amd/display: Introduce DML2")
Signed-off-by: José Pekkarinen <jose.pekkarinen@...hound.fi>
---
 drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c
index 510be909cd75..7dceaa486841 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c
@@ -5420,7 +5420,7 @@ static void CalculateOutputLink(
 					*OutBpp = TruncToValidBPP((1 - Downspreading / 100) * 13500, OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, ForcedOutputLinkBPP, LinkDSCEnable, Output,
 												OutputFormat, DSCInputBitPerComponent, NumberOfDSCSlices, (dml_uint_t)AudioSampleRate, AudioSampleLayout, ODMModeNoDSC, ODMModeDSC, RequiredSlots);
 
-					if (OutBpp == 0 && PHYCLKD32PerState < 20000 / 32 && DSCEnable == dml_dsc_enable_if_necessary && ForcedOutputLinkBPP == 0) {
+					if (OutBpp == NULL && PHYCLKD32PerState < 20000 / 32 && DSCEnable == dml_dsc_enable_if_necessary && ForcedOutputLinkBPP == 0) {
 						*RequiresDSC = true;
 						LinkDSCEnable = true;
 						*OutBpp = TruncToValidBPP((1 - Downspreading / 100) * 13500, OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, ForcedOutputLinkBPP, LinkDSCEnable, Output,
-- 
2.39.2

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