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Message-ID: <ZVOCIj1oPoEcKe7L@smile.fi.intel.com>
Date: Tue, 14 Nov 2023 16:20:18 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: "larry.lai" <larry.lai@...jingtech.com>
Cc: lee@...nel.org, linus.walleij@...aro.org, pavel@....cz,
linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org,
linux-leds@...r.kernel.org, GaryWang@...on.com.tw,
musa.lin@...jingtech.com, jack.chang@...jingtech.com,
noah.hung@...jingtech.com
Subject: Re: [PATCH V7 0/3] Add support control UP board CPLD/FPGA pin control
On Tue, Oct 31, 2023 at 09:51:16AM +0800, larry.lai wrote:
> The UP board <https://up-board.org/> is the computer board for
> Professional Makers and Industrial Applications. We want to upstream
> the UP board 40-pin GP-bus Kernel driver for giving the users better
> experience on the software release. (not just download from UP board
> github)
>
> These patches are generated from the Linux kernel mainline tag v6.0.
>
> This is the PATCH V7 and fixed kernel test robot compiler warning and
> addressed Lee Jones review comments.
(You have trailing white spaces in the above multi-line paragraphs.)
Sorry for the delay, but this series needs much more work before being
considered for the inclusion. I just finished commenting each patch
individually.
--
With Best Regards,
Andy Shevchenko
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