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Message-ID: <ZVOIMy0BB1eVwWup@xhacker>
Date:   Tue, 14 Nov 2023 22:46:11 +0800
From:   Jisheng Zhang <jszhang@...nel.org>
To:     Chen Wang <unicorn_wang@...look.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Chao Wei <chao.wei@...hgo.com>, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH 1/2] riscv: dts: cv1800b: add pinctrl node for cv1800b

On Tue, Nov 14, 2023 at 09:38:47AM +0800, Chen Wang wrote:
> 
> On 2023/11/13 8:57, Jisheng Zhang wrote:
> > Add the reset device tree node to cv1800b SoC reusing the
> > pinctrl-single driver.
> > 
> > Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
> > ---
> >   arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++
> >   arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++
> >   2 files changed, 29 insertions(+)
> >   create mode 100644 arch/riscv/boot/dts/sophgo/cv-pinctrl.h
> 
> 
> I'm afraid there will not be more cv* chip in coming days. So I would
> suggest you use "cv1800b-pinctrl.h" first here. If we see more cv* coming,
> and if they will reuse the definition here, we can consider optimize the
> filename, what do you think?
> 
> BTW, how about defining the file name as "cv1800b.h" and I'm not sure if you

hmm, cv1800b-pinctrl.h is fine. Only pinctrl related stuff will be put
there.

> will have more macro const definition for other modules?
> 
> > diff --git a/arch/riscv/boot/dts/sophgo/cv-pinctrl.h b/arch/riscv/boot/dts/sophgo/cv-pinctrl.h
> > new file mode 100644
> > index 000000000000..ed78b6fb3142
> > --- /dev/null
> > +++ b/arch/riscv/boot/dts/sophgo/cv-pinctrl.h
> > @@ -0,0 +1,19 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * This header provides constants for pinctrl bindings for Sophgo CV* SoC.
> > + *
> > + * Copyright (C) 2023 Jisheng Zhang <jszhang@...nel.org>
> > + */
> > +#ifndef _DTS_RISCV_SOPHGO_CV_PINCTRL_H
> > +#define _DTS_RISCV_SOPHGO_CV_PINCTRL_H
> > +
> > +#define MUX_M0		0
> > +#define MUX_M1		1
> > +#define MUX_M2		2
> > +#define MUX_M3		3
> > +#define MUX_M4		4
> > +#define MUX_M5		5
> > +#define MUX_M6		6
> > +#define MUX_M7		7
> > +
> > +#endif
> > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > index e04df04a91c0..7a44d8e8672b 100644
> > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > @@ -6,6 +6,8 @@
> >   #include <dt-bindings/interrupt-controller/irq.h>
> >   #include <dt-bindings/reset/sophgo,cv1800b-reset.h>
> > +#include "cv-pinctrl.h"
> > +
> >   / {
> >   	compatible = "sophgo,cv1800b";
> >   	#address-cells = <1>;
> > @@ -55,6 +57,14 @@ soc {
> >   		dma-noncoherent;
> >   		ranges;
> > +		pinctrl0: pinctrl@...1000 {
> > +			compatible = "pinctrl-single";
> > +			reg = <0x3001000 0x130>;
> > +			#pinctrl-cells = <1>;
> > +			pinctrl-single,register-width = <32>;
> > +			pinctrl-single,function-mask = <0x00000007>;
> > +		};
> > +
> >   		rst: reset-controller@...3000 {
> >   			compatible = "sophgo,cv1800b-reset";
> >   			reg = <0x03003000 0x1000>;

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