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Message-ID: <CAFULd4Z3DZh0SoEyNHfz3=DM2CkDGtNP_f1gVx64NJkzmWp-Pw@mail.gmail.com>
Date: Wed, 15 Nov 2023 21:58:29 +0100
From: Uros Bizjak <ubizjak@...il.com>
To: Michael Kelley <mhklinux@...look.com>
Cc: "linux-hyperv@...r.kernel.org" <linux-hyperv@...r.kernel.org>,
"x86@...nel.org" <x86@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"K. Y. Srinivasan" <kys@...rosoft.com>,
Haiyang Zhang <haiyangz@...rosoft.com>,
Wei Liu <wei.liu@...nel.org>, Dexuan Cui <decui@...rosoft.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...nel.org>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"H. Peter Anvin" <hpa@...or.com>
Subject: Re: [PATCH] x86/hyperv: Use atomic_try_cmpxchg() to micro-optimize hv_nmi_unknown()
On Wed, Nov 15, 2023 at 6:19 PM Michael Kelley <mhklinux@...look.com> wrote:
>
> From: Uros Bizjak <ubizjak@...il.com> Sent: Tuesday, November 14, 2023 8:59 AM
> >
> > Use atomic_try_cmpxchg() instead of atomic_cmpxchg(*ptr, old, new) == old
> > in hv_nmi_unknown(). On x86 the CMPXCHG instruction returns success in
> > the ZF flag, so this change saves a compare after CMPXCHG. The generated
> > asm code improves from:
> >
> > 3e: 65 8b 15 00 00 00 00 mov %gs:0x0(%rip),%edx
> > 45: b8 ff ff ff ff mov $0xffffffff,%eax
> > 4a: f0 0f b1 15 00 00 00 lock cmpxchg %edx,0x0(%rip)
> > 51: 00
> > 52: 83 f8 ff cmp $0xffffffff,%eax
> > 55: 0f 95 c0 setne %al
> >
> > to:
> >
> > 3e: 65 8b 15 00 00 00 00 mov %gs:0x0(%rip),%edx
> > 45: b8 ff ff ff ff mov $0xffffffff,%eax
> > 4a: f0 0f b1 15 00 00 00 lock cmpxchg %edx,0x0(%rip)
> > 51: 00
> > 52: 0f 95 c0 setne %al
> >
> > No functional change intended.
> >
> > Cc: "K. Y. Srinivasan" <kys@...rosoft.com>
> > Cc: Haiyang Zhang <haiyangz@...rosoft.com>
> > Cc: Wei Liu <wei.liu@...nel.org>
> > Cc: Dexuan Cui <decui@...rosoft.com>
> > Cc: Thomas Gleixner <tglx@...utronix.de>
> > Cc: Ingo Molnar <mingo@...nel.org>
> > Cc: Borislav Petkov <bp@...en8.de>
> > Cc: Dave Hansen <dave.hansen@...ux.intel.com>
> > Cc: "H. Peter Anvin" <hpa@...or.com>
> > Signed-off-by: Uros Bizjak <ubizjak@...il.com>
> > ---
> > arch/x86/kernel/cpu/mshyperv.c | 5 ++++-
> > 1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/x86/kernel/cpu/mshyperv.c
> > b/arch/x86/kernel/cpu/mshyperv.c index e6bba12c759c..01fa06dd06b6
> > 100644
> > --- a/arch/x86/kernel/cpu/mshyperv.c
> > +++ b/arch/x86/kernel/cpu/mshyperv.c
> > @@ -262,11 +262,14 @@ static uint32_t __init ms_hyperv_platform(void)
> > static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs) {
> > static atomic_t nmi_cpu = ATOMIC_INIT(-1);
> > + unsigned int old_cpu, this_cpu;
> >
> > if (!unknown_nmi_panic)
> > return NMI_DONE;
> >
> > - if (atomic_cmpxchg(&nmi_cpu, -1, raw_smp_processor_id()) != -1)
> > + old_cpu = -1;
> > + this_cpu = raw_smp_processor_id();
> > + if (!atomic_try_cmpxchg(&nmi_cpu, &old_cpu, this_cpu))
> > return NMI_HANDLED;
> >
> > return NMI_DONE;
> > --
> > 2.41.0
>
> The change looks correct to me. But is there any motivation other
> than saving 3 bytes of generated code? This is not a performance
> sensitive path. And the change adds 3 lines of source code. So
> I wonder if the change is worth the churn.
Yes, I was trying to make the function more easy to understand and
similar to nmi_panic() from kernel/panic.c. I had also the idea of
using CPU_INVALID #define instead of -1, but IMO, the above works as
well.
> In any case,
>
> Reviewed-by: Michael Kelley <mhklinux@...look.com>
Thanks,
Uros.
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