linux-kernel - Re: [PATCH v4 0/5] powerpc/smp: Topology and shared processor optimizations

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Date:   Wed, 15 Nov 2023 11:46:16 +0530
From:   Srikar Dronamraju <srikar@...ux.vnet.ibm.com>
To:     "Aneesh Kumar K.V" <aneesh.kumar@...ux.ibm.com>
Cc:     Michael Ellerman <mpe@...erman.id.au>,
        Mark Rutland <mark.rutland@....com>,
        Valentin Schneider <vschneid@...hat.com>,
        Vincent Guittot <vincent.guittot@...aro.org>,
        "Paul E. McKenney" <paulmck@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>,
        linux-kernel@...r.kernel.org, Rohan McLure <rmclure@...ux.ibm.com>,
        Nicholas Piggin <npiggin@...il.com>,
        linuxppc-dev <linuxppc-dev@...ts.ozlabs.org>,
        Josh Poimboeuf <jpoimboe@...nel.org>
Subject: Re: [PATCH v4 0/5] powerpc/smp: Topology and shared processor
 optimizations

* Aneesh Kumar K.V <aneesh.kumar@...ux.ibm.com> [2023-11-15 11:24:59]:

> Srikar Dronamraju <srikar@...ux.vnet.ibm.com> writes:
> 
> > PowerVM systems configured in shared processors mode have some unique
> > challenges. Some device-tree properties will be missing on a shared
> > processor. Hence some sched domains may not make sense for shared processor
> > systems.
> >
> > Most shared processor systems are over-provisioned. Underlying PowerVM
> > Hypervisor would schedule at a Big Core granularity. The most recent power
> > processors support two almost independent cores. In a lightly loaded
> > condition, it helps the overall system performance if we pack to lesser
> > number of Big Cores.
> >
> 
> Is this good to do if the systems are not over-provisioned? What will be
> the performance impact in that case with and without the change?
> 

We are consolidating 1 thread per thread group (aka SMT domain).
Since each thread-group is suppose to be independent including having a
private L1/L2/L3 cache, we expect minimal impact in non over provisioned
scenario.

In Over utilization scenario, the changes in this patchset will not even kick in.

-- 
Thanks and Regards
Srikar Dronamraju