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Message-ID: <20231115063201.rc3pf3pga6zhoqb5@vireshk-i7>
Date:   Wed, 15 Nov 2023 12:02:01 +0530
From:   Viresh Kumar <viresh.kumar@...aro.org>
To:     Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc:     Johan Hovold <johan@...nel.org>, Viresh Kumar <vireshk@...nel.org>,
        Nishanth Menon <nm@...com>, Stephen Boyd <sboyd@...nel.org>,
        linux-pm@...r.kernel.org,
        Vincent Guittot <vincent.guittot@...aro.org>,
        "Rafael J. Wysocki" <rafael@...nel.org>, andersson@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, linux-kernel@...r.kernel.org,
        robdclark@...il.com
Subject: Re: [PATCH 2/2] OPP: Disallow "opp-hz" property without a
 corresponding clk

On 11-10-23, 11:18, Viresh Kumar wrote:
> On 16-02-23, 12:17, Manivannan Sadhasivam wrote:
> > Sorry for the delay. I've submitted the dts changes [1] to handle the CPU clocks
> > for the rest of the Qcom SoCs.
> > 
> > For the Qcom GPUs, I've CCed Rob Clark who is the maintainer.
> > 
> > Rob, here is the background on the issue that is being discussed in this
> > thread:
> > 
> > Viresh submitted a series [2] back in July to improve the OPP framework, but
> > that ended up breaking cpufreq on multiple Qcom SoCs. After investigation, it
> > was found that the series was expecting the clocks supplied to the OPP end
> > devices like CPUs/GPUs to be modeled in DT. But on Qcom platforms even though
> > the clocks for these nodes are supplied by a separate entity, like CPUFreq
> > (EPSS/OSM) for CPUs and GMU for GPUs, there was no clock property present in
> > the respective nodes. And these nodes are using OPP table to switch frequencies
> > dynamically.
> > 
> > While the series was merged with a hack that still allows the OPP nodes without
> > clock property in DT, we came to an agreement that the clock hierarchy should
> > be modeled properly.
> > 
> > So I submitted a series [3] that added clock provider support to cpufreq driver
> > and sourced the clock from cpufreq node to CPU nodes in DT.
> > 
> > Likewise, it should be handled for the adreno GPUs whose clock is managed by
> > GMU on newer SoCs. Can you take a look at this?
> 
> Any update on this ?

Mani,

Ping.

-- 
viresh

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