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Message-ID: <01b9bc3f-2afb-bd33-1212-d1dc7999b2bc@quicinc.com>
Date: Thu, 16 Nov 2023 12:36:38 -0800
From: Abhinav Kumar <quic_abhinavk@...cinc.com>
To: Jonathan Marek <jonathan@...ek.ca>,
<freedreno@...ts.freedesktop.org>
CC: Rob Clark <robdclark@...il.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Vinod Koul <vkoul@...nel.org>, Robert Foss <rfoss@...nel.org>,
Neil Armstrong <neil.armstrong@...aro.org>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<linux-arm-msm@...r.kernel.org>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<dri-devel@...ts.freedesktop.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] drm/msm/dsi: use the correct VREG_CTRL_1 value for 4nm
cphy
On 11/9/2023 4:02 PM, Jonathan Marek wrote:
> Use the same value as the downstream driver. This change is needed for CPHY
> mode to work correctly.
>
> Fixes: 8b034e6771113 ("drm/msm/dsi: add support for DSI-PHY on SM8550")
> Signed-off-by: Jonathan Marek <jonathan@...ek.ca>
> ---
> v2: fixed the Fixes: line
>
> drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Good catch !
LGTM
Reviewed-by: Abhinav Kumar <quic_abhinavk@...cinc.com>
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> index 3b1ed02f644d..89a6344bc865 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> @@ -918,7 +918,7 @@ static int dsi_7nm_phy_enable(struct msm_dsi_phy *phy,
> if ((phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V5_2)) {
> if (phy->cphy_mode) {
> vreg_ctrl_0 = 0x45;
> - vreg_ctrl_1 = 0x45;
> + vreg_ctrl_1 = 0x41;
> glbl_rescode_top_ctrl = 0x00;
> glbl_rescode_bot_ctrl = 0x00;
> } else {
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