linux-kernel - Re: [PATCH v2 1/1] clocksource/timer-risc: Add riscv_clock

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <CAK9=C2UDF+osNRNp4V8JgAK7DKEdOY18s-8dKQUnBZ++fdK8DA@mail.gmail.com>
Date:   Thu, 16 Nov 2023 15:42:15 +0530
From:   Anup Patel <apatel@...tanamicro.com>
To:     Joshua Yeong <joshua.yeong@...rfivetech.com>
Cc:     daniel.lezcano@...aro.org, tglx@...utronix.de,
        paul.walmsley@...ive.com, palmer@...belt.com,
        aou@...s.berkeley.edu, leyfoon.tan@...rfivetech.com,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
        Anup Patel <anup@...infault.org>
Subject: Re: [PATCH v2 1/1] clocksource/timer-risc: Add riscv_clock_shutdown callback

On Thu, Nov 16, 2023 at 9:38 AM Joshua Yeong
<joshua.yeong@...rfivetech.com> wrote:
>
> Add clocksource detach/shutdown callback to disable RISC-V timer interrupt when
> switching out riscv timer as clock source
>
> Signed-off-by: Joshua Yeong <joshua.yeong@...rfivetech.com>

Typo in patch subject: s/timer-risc/timer-riscv/

Otherwise, it looks good to me.

Reviewed-by: Anup Patel <anup@...infault.org>

Regards,
Anup

> ---
>  drivers/clocksource/timer-riscv.c | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
> index 57857c0dfba9..e66dcbd66566 100644
> --- a/drivers/clocksource/timer-riscv.c
> +++ b/drivers/clocksource/timer-riscv.c
> @@ -61,12 +61,19 @@ static int riscv_clock_next_event(unsigned long delta,
>         return 0;
>  }
>
> +static int riscv_clock_shutdown(struct clock_event_device *evt)
> +{
> +       riscv_clock_event_stop();
> +       return 0;
> +}
> +
>  static unsigned int riscv_clock_event_irq;
>  static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = {
>         .name                   = "riscv_timer_clockevent",
>         .features               = CLOCK_EVT_FEAT_ONESHOT,
>         .rating                 = 100,
>         .set_next_event         = riscv_clock_next_event,
> +       .set_state_shutdown     = riscv_clock_shutdown,
>  };
>
>  /*
> --
> 2.25.1
>